SSTE32882KA1AKG IDT, Integrated Device Technology Inc, SSTE32882KA1AKG Datasheet - Page 12

• Manufacturer Part Number: SSTE32882KA1AKG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTE32882KA1AKG

• Lead Free Status / RoHS Status: Compliant

Function Table (Each Flip Flop) with QuadCS Mode Enabled
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
RESET
1
and high) when RESET is driven high.
2
3
is disabled independent of control word RC0 once 3T timing is activated
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
It is illegal to hold both the CK and CK inputs at static logic high levels or static complementary logic levels (low
A/C/E = DA0..DA15, DBA0..DBA2, DRAS, DCAS, DWE, DODTn, DCKEn
Depending on Control Word RC0 Bit DA4. If RC0 DA4 is cleared, previous state is maintained. Address floating
DCS[3:0]
X or float
XXXX
XXXX
HHHH
LHHH
HLHH
HHLH
HHHL
LLHH
HHLL
LHLH
HLLH
LHHL
HLHL
LLLH
LLHL
LHLL
HLLL
LLLL
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
Inputs
L or H
CK
X or
float
↑
↑
↑
↑
↑
↑
↑
↑
↑
L
↑
↑
1
H or L
CK
X or
float
↓
↓
↓
↓
↓
↓
↓
↓
↓
L
↓
↓
1
X or float
A/C/E
Control
Word
Dn
Dn
Dn
Dn
Dn
Dn
Dn
Dn
X
X
X
X
2
or float
change
change
change
float
float
Qn
No
No
Dn
Dn
Dn
Dn
Dn
Dn
Dn
Dn
No
3
QCS[3:0]
No change
12
HHHH
HHHH
LHHH
HLHH
HHLH
HHHL
LHLH
HLLH
LHHL
HLHL
float
float
Ilegal Input States
Outputs
COMMERCIAL TEMPERATURE RANGE
QxODTn
No change
No change
SSTE32882KA1
DODTn
DODTn
DODTn
DODTn
DODTn
DODTn
DODTn
DODTn
DODTn
float
float
QxCKEn
No change
No change
DCKEn
DCKEn
DCKEn
DCKEn
DCKEn
DCKEn
DCKEn
DCKEn
DCKEn
L
L
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