SSTE32882KA1AKG IDT, Integrated Device Technology Inc, SSTE32882KA1AKG Datasheet - Page 24

• Manufacturer Part Number: SSTE32882KA1AKG
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTE32882KA1AKG

• Lead Free Status / RoHS Status: Compliant

Timing Requirements
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
SSTE32882KA1
1.25V/1.35V/1.5V REGISTERING CLOCK DRIVER WITH PARITY TEST AND QUAD CHIP SELECT
tFixedout
Symbol
t
f
t
t
CKOFF
CLOCK
CH
t
f
t
t
CKEV
t
INDIS
puts
TEST
MRD
QDIS
ACT
t
1
2
3
4
Times–Hold Time Calculation” figure below).
t
SU
H
/t
CL
All specified timing parameters apply.
Timing parameters specified for frequency band 2 apply.
Clock cycle time.
This parameter is not necessarily production tested (see the “Voltage Waveforms for Setup and Hold
Input Clock Frequency
Input Clock Frequency
Pulse Duration, CK, CK
HIGH or LOW
Inputs active time before
RESET is taken HIGH
Command word to
command word
programming delay
Input Buffers disable time
after DCKE[1:0] is LOW
Output Buffers Hi-Z after
QxCKEn is driven LOW
Number of tCK required for
both DCKE0 and DCKE1
to remain LOW before both
CK/CK are driven low
Input buffers (DCKE0 and
DCKE1) disable time after
CK/CK = LOW
Static Register Output after
DCKE0 or DCKE1 is
HIGH at the input (exit
from Power Saving state)
Setup Time
Hold Time
THE INFORMATION IN THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE
Parameter
6
(DDR3U 1.25V)
5
4
Application Frequency
Test Frequency
DCKE0/1 = LOW and
DCS[n:0] = HIGH
Number of clock cycles
between two command
programming accesses
DCKE[1:0] = LOW;
RESET = HIGH; CK/CK =
Toggling; RC9[DBA1] = 1
and RC9[DBA0] = 0 or 1
DCKE[1:0] = LOW;
RESET = HIGH; CK/CK =
Toggling; RC9[DBA1] = 1
and RC9[DBA0] = 0 or 1
DCKE[1:0] = LOW;
RESET = HIGH;
CK/CK = Toggling
DCKE[1:0] = LOW;
RESET = HIGH;
CK/CK = LOW
RC9[DBA1] = 1 and
RC9[DBA0] = 0 or 1
Input valid before CK/CK
Input to remain valid after
CK/CK
Conditions
2
1
DDR3U-800/
Min
300
100
175
0.4
1.5
70
1066/1333
8
8
1
5
2
1
24
Max
670
300
1.5
4
3
COMMERCIAL TEMPERATURE RANGE
DDR3U-1600
Min
300
125
0.4
1.5
70
50
8
8
1
5
2
1
SSTE32882KA1
Max
810
300
1.5
4
3
Unit
MHz
MHz
t
t
t
t
t
t
t
t
CK
CK
CK
CK
CK
CK 3
CK 3
CK
ps
ps
3
3
3
3
3
3
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