PI7C8150ND Pericom Semiconductor, PI7C8150ND Datasheet - Page 31

• Manufacturer Part Number: PI7C8150ND
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ND

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Case: BGA
• Dc: 04+
• Lead Free Status / Rohs Status: Not Compliant

3.7.3
Table 4-6. Device Number to IDSEL S_AD Pin Mapping
!
PI7C8150 asserts a unique address line based on the device number. These address lines
may be used as secondary bus IDSEL signals. The mapping of the address lines depends on
the device number in the Type 1 address bits P_AD[15:11]. Table 4–6 presents the
mapping that PI7C8150 uses.
PI7C8150 can assert up to 9 unique address lines to be used as IDSEL signals for
up to 9 devices on the secondary bus, for device numbers ranging from 0 through 8.
Because of electrical loading constraints of the PCI bus, more than 9 IDSEL signals should
not be necessary. However, if device numbers greater than 9 are desired, some external
method of generating IDSEL lines must be used, and no upper address bits are then
asserted. The configuration transaction is still translated and passed from the primary bus to
the secondary bus. If no IDSEL pin is asserted to a secondary device, the transaction ends
in a master abort.
PI7C8150 forwards Type 1 to Type 0 configuration read or write transactions as delayed
transactions. Type 1 to Type 0 configuration read or write transactions are limited to a
single 32-bit data transfer.
TYPE 1 TO TYPE 1 FORWARDING
Type 1 to Type 1 transaction forwarding provides a hierarchical configuration mechanism
when two or more levels of PCI-to-PCI bridges are used.
When PI7C8150 detects a Type 1 configuration transaction intended for a PCI bus
downstream from the secondary bus, PI7C8150 forwards the transaction unchanged to the
secondary bus. Ultimately, this transaction is translated to a Type 0 configuration command
or to a special cycle transaction by a downstream PCI-to-PCI bridge. Downstream Type 1
to Type 1 forwarding occurs when the following conditions are met during the address
phase:
!
Device Number
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
10h – 1Eh
1Fh
Leaves unchanged the function number and register number fields.
The lowest two address bits are equal to 01b.
P_AD[15:11]
00000
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
10000 – 11110
11111
21
Secondary IDSEL S_AD[31:16]
0000 0000 0000 0001
0000 0000 0000 0010
0000 0000 0000 0100
0000 0000 0000 1000
0000 0000 0001 0000
0000 0000 0010 0000
0000 0000 0100 0000
0000 0000 1000 0000
0000 0001 0000 0000
0000 0010 0000 0000
0000 0100 0000 0000
0000 1000 0000 0000
0001 0000 0000 0000
0010 0000 0000 0000
0100 0000 0000 0000
1000 0000 0000 0000
0000 0000 0000 0000
Generate special cycle (P_AD[7:2] > 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
March 19, 2003 – Revision 1.04
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
S_AD
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
-
-
PI7C8150