PI7C8150ND Pericom Semiconductor, PI7C8150ND Datasheet - Page 70

• Manufacturer Part Number: PI7C8150ND
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ND

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 85C
• Package Type: BGA
• Rad Hardened: No
• Case: BGA
• Dc: 04+
• Lead Free Status / Rohs Status: Not Compliant

12.3
13
13.1
When S_RESET_L is asserted by means of the secondary reset bit, PI7C8150 remains
accessible during secondary interface reset and continues to respond to accesses to its
configuration space from the primary interface.
CHIP RESET
The chip reset bit in the diagnostic control register can be used to reset the PI7C8150 and
the secondary bus.
When the chip reset bit is set, all registers and chip state are reset and all signals are
tristated. S_RESET_L is asserted and the secondary reset bit is automatically set.
S_RESET_L remains asserted until a configuration write operation clears the secondary
reset bit and the serial clock mask has been shifted in. Within 20 PCI clock cycles after
completion of the configuration write operation, PI7C8150’s reset bit automatically clears
and PI7C8150 is ready for configuration.
During reset, PI7C8150 is inaccessible.
SUPPORTED COMMANDS
The PCI command set is given below for the primary and secondary interfaces.
PRIMARY INTERFACE
P_CBE [3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
Command
Interrupt
Acknowledge
Special Cycle
I/O Read
I/O Write
Reserved
Reserved
Memory Read
Memory Write
Reserved
Reserved
Configuration Read
60
Same as I/O Read.
Action
Ignore
Do not claim. Ignore.
1. If address is within pass through I/O range, claim and pass
through.
2. Otherwise, do not pass through and do not claim for
internal access.
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1. If address is within pass through memory range, claim and
pass through.
2. If address is within pass through memory mapped I/O
range, claim and pass through.
3. Otherwise, do not pass through and do not claim for
internal access.
Same as Memory Read.
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Type 0 Configuration Read:
If the bridge’s IDSEL line is asserted, perform function
decode and claim if target function is implemented.
Otherwise, ignore. If claimed, permit access to target
function’s configuration registers. Do not pass through
under any circumstances.
March 19, 2003 – Revision 1.04
2-PORT PCI-TO-PCI BRIDGE
ADVANCE INFORMATION
PI7C8150