NP8P128A13BSM60E Micron Technology Inc, NP8P128A13BSM60E Datasheet - Page 24

• Manufacturer Part Number: NP8P128A13BSM60E
• Manufacturer: Micron Technology Inc

Specifications of NP8P128A13BSM60E

• Lead Free Status / Rohs Status: Supplier Unconfirmed

8.0
8.1
Datasheet
24
Program Operations
There are five kinds of write operations available in Numonyx® Omneo™ P8P PCM.
Writing a program command to the device initiates internally timed sequences that
write the requested word.
The WSM executes a sequence of internally timed events to write desired bits at the
addressed location and verify that the bits are sufficiently written. For Word
Programming the memory changes specifically addressed bits to “0”. “1” bits do not
change the memory cell contents. This allows individual data-bits to be programmed
(“0”) while “1” bits serve as data masks. For Bit Alterable Word Write, the memory cell
can change from “0” to “1” or “1” to a “0”.
The Status Register can be examined for write progress and errors by reading any
address within the device during a write operation. Issuing a Read Status Register
command brings the Status Register to the foreground allowing write progress to be
monitored or detected at other device addresses. Status Register bit SR.7 indicates
device write status while the write sequence executes. CE# or OE# toggle (during
polling) updates the Status Register. Valid commands that can be issued to the writing
device during write are Read Status Register, Write Suspend, Read Identifier, Read
Query, and Read Array. However Read Array will return unknown data while the device
is busy.
When writing completes, Status Register bit SR.4 indicates write success if zero (0) or
failure if set (1). If SR.3 is set (1), the WSM couldn’t execute the write command
because V
targeted a locked block and was aborted. Attempting to write in an erase suspended
block will result in failure and SR.4 will be set (1).
After examining the Status Register, it should be cleared by the Clear Status Register
command before issuing a new command. The device remains in Status Register mode
until another command is written to that device. Any command can follow once writing
completes.
Word Program
The system processor writes the Word Program Setup command (40h/10h) to the
device followed by a second write that specifies the address and data to be
programmed. The device accessed during both of the command cycles automatically
outputs Status Register data when the device address is read. The device accessed
during the second cycle (the data cycle) of the program command sequence will be
where the data is programmed. See
Write Flowchart” on page
When V
V
in-system PCM modifications.
page 27
CC
• Word Program (40h, or 10h)
• Bit Alterable Word Write (42h)
• Buffered Program (E8h)
• Bit Alterable Buffered Write (EAh)
• Buffered Program on all 1’s (DEh)
input. If V
PP
shows PCM power supply usage in various configurations.
PP
is greater than V
was outside acceptable limits. If SR.1 is set (1), the write operation
PP
is driven by a logic signal, V
75.
PPLK
Figure 5, “Example V
, program-and erase-currents are drawn through the
Section 32, “Buffer Program or Bit Alterable Buffer
PP
must remain above V
PP
Power Supply Configuration” on
Numonyx® Omneo™ P8P Datasheet
PPMIN
to perform
August 2010
316144-07