NP8P128A13BSM60E Micron Technology Inc, NP8P128A13BSM60E Datasheet - Page 87

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NP8P128A13BSM60E

Manufacturer Part Number
NP8P128A13BSM60E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of NP8P128A13BSM60E

Lead Free Status / Rohs Status
Supplier Unconfirmed
Numonyx® Omneo™ P8P Datasheet
Table 40: Device Geometry Definition
August 2010
316144-07
Offset
2Ah
2Ch
2Dh
27h
28h
31h
35h
Length
1
2
2
1
4
4
4
“n” such that device size = 2
Flash device interface code assignment:
"n" such that n+1 specifies the bit field that represents the flash device width
capabilities as described in the table:
“n” such that maximum number of bytes in write buffer = 2
Number of erase block regions (x) within device:
Erase Block Region 1 Information
Erase Block Region 2 Information
Reserved for future erase block region information
1. x = 0 means no erase blocking; the device erases in bulk
2. x specifies the number of device regions with one or
3. Symmetrically blocked partitions have one blocking region
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
bits 0–15 = y, y+1 = number of identical-size erase blocks
bits 16–31 = z, region erase block(s) size are z x 256 bytes
15
7
more contiguous same-size erase blocks.
14
6
13
5
Address
Device Geometry Definition
2A:
2B:
2C:
2D:
2E:
27:
28:
29:
2F:
30:
31:
32:
33:
34:
35:
36:
37:
38:
12
4
n
in number of bytes
Description
x64
11
3
--7E
--18
--02
--03
--00
--80
--00
--00
--00
--02
--00
--00
--00
--00
01:
00:
06:
00:
–B
x32
10
128 Mbit
2
x16
1
9
--7E
--18
--02
--00
--00
--02
--03
--00
--80
--00
--00
--00
--00
--00
01:
00:
06:
00:
–T
n
x8
0
8
Add.
2A:
2B:
2C:
2D:
2E:
2F:
27:
28:
29:
30:
31:
32:
33:
34:
35:
36:
37:
38:
Code
See table below
See table below
See table below
See table below
See table below
Hex
--01
--00
--06
--00
Value
x16
64
87

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