DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 26

• Manufacturer Part Number: DP83849CVS/NOPB
• Description: IC TXRX ETHERNET PHY DUAL 80TQFP
• Manufacturer: National Semiconductor
• Type: Transceiverr

Specifications of DP83849CVS/NOPB

• Number Of Drivers/receivers: 2/2
• Protocol: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Data Rate: 100Mbps
• Supply Voltage Range: 3V To 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 80
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 10Mbps
• For Use With: DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83849CVS; *DP83849CVS/NOPB; DP83849CVS

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3.5 Flexible MII Port Assignment
The DP83849I supports a flexible assignment scheme for
each of the channels to the MII/RMII interface. Either of
the MII ports may be assigned to the internal channels A/B.
These values are controlled by the RMII and Bypass Reg-
ister (RBR), address 17h.
Receive assignments can be made separately to allow
even more flexibility (i.e. both channels could transmit from
MII A while still allowing separate receive paths for the
channels).
Port
Port
MII
MII
A
B
RX
RX
TX
TX
Transmit assignments and
Figure 4. MII Port Mapping
TX
TX
RX
RX
26
In addition, the opposite receive channel may be used as
the transmit source for each channel.
Figure 4, Channel A receive data may be used as the
Channel B transmit data source while Channel B receive
data may be used as the Channel A transmit data source.
For proper clock synchronization, this function requires the
device be in RMII mode or Single Clock MII mode of opera-
tion.
RXD2_B/EXTENDER_EN to enable this mode.
Channel A
Channel B
A configuration strap is provided on pin 56,
100BASE-TX
100BASE-TX
10BASE-T
10BASE-T
or
or
As shown in