DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 54

• Manufacturer Part Number: DP83849CVS/NOPB
• Description: IC TXRX ETHERNET PHY DUAL 80TQFP
• Manufacturer: National Semiconductor
• Type: Transceiverr

Specifications of DP83849CVS/NOPB

• Number Of Drivers/receivers: 2/2
• Protocol: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Data Rate: 100Mbps
• Supply Voltage Range: 3V To 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 80
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 10Mbps
• For Use With: DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83849CVS; *DP83849CVS/NOPB; DP83849CVS

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7.1.1 Basic Mode Control Register (BMCR)
Bit
15
14
13
12
11
10
9
8
AUTO-NEGOTI-
AUTO-NEGOTI-
DUPLEX MODE
POWER DOWN
SELECTION
LOOPBACK
RESTART
Bit Name
ISOLATE
ENABLE
SPEED
RESET
ATION
ATION
Table 20. Basic Mode Control Register (BMCR), address 00h
Strap, RW
Strap, RW
Strap, RW
0, RW/SC
0, RW/SC
Default
0, RW
0, RW
0, RW
Reset:
1 = Initiate software Reset / Reset in Process.
0 = Normal operation.
This bit, which is self-clearing, returns a value of one until the reset process
is complete. The configuration is re-strapped.
Loopback:
1 = Loopback enabled.
0 = Normal operation.
The loopback function enables MII transmit data to be routed to the MII re-
ceive data path.
Setting this bit may cause the descrambler to lose synchronization and
produce a 500 s “dead time” before any valid data will appear at the MII
receive outputs.
Speed Select:
When auto-negotiation is disabled writing to this bit allows the port speed
to be selected.
1 = 100 Mb/s.
0 = 10 Mb/s.
Auto-Negotiation Enable:
Strap controls initial value at reset.
1 = Auto-Negotiation Enabled - bits 8 and 13 of this register are ignored
when this bit is set.
0 = Auto-Negotiation Disabled - bits 8 and 13 determine the port speed and
duplex mode.
Power Down:
1 = Power down.
0 = Normal operation.
Setting this bit powers down the PHY. Only the register block is enabled
during a power down condition. This bit is OR’d with the input from the
PWRDOWN_INT pin. When the active low PWRDOWN_INT pin is assert-
ed, this bit will be set.
Isolate:
1 = Isolates the Port from the MII with the exception of the serial manage-
ment.
0 = Normal operation.
Restart Auto-Negotiation:
1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation process. If
Auto-Negotiation is disabled (bit 12 = 0), this bit is ignored. This bit is self-
clearing and will return a value of 1 until Auto-Negotiation is initiated,
whereupon it will self-clear. Operation of the Auto-Negotiation process is
not affected by the management entity clearing this bit.
0 = Normal operation.
Duplex Mode:
When auto-negotiation is disabled writing to this bit allows the port Duplex
capability to be selected.
1 = Full Duplex operation.
0 = Half Duplex operation.
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Description