DP83849CVS/NOPB National Semiconductor, DP83849CVS/NOPB Datasheet - Page 42

• Manufacturer Part Number: DP83849CVS/NOPB
• Description: IC TXRX ETHERNET PHY DUAL 80TQFP
• Manufacturer: National Semiconductor
• Type: Transceiverr

Specifications of DP83849CVS/NOPB

• Number Of Drivers/receivers: 2/2
• Protocol: Ethernet
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 80-TQFP, 80-VQFP
• Data Rate: 100Mbps
• Supply Voltage Range: 3V To 3.6V
• Logic Case Style: TQFP
• No. Of Pins: 80
• Operating Temperature Range: 0°C To +70°C
• Msl: MSL 3 - 168 Hours
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 10Mbps
• For Use With: DP83849CVS-EVK - BOARD EVALUATION DP83849CVS
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: *DP83849CVS; *DP83849CVS/NOPB; DP83849CVS

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5.2 ESD Protection
Typically, ESD precautions are predominantly in effect
when handling the devices or board before being installed
in a system. In those cases, strict handling procedures
need be implemented during the manufacturing process to
greatly reduce the occurrences of catastrophic ESD
events. After the system is assembled, internal compo-
nents are less sensitive from ESD events.
The network interface pins are more susceptible to ESD
events.
5.3 Clock In (X1) Requirements
The DP83849I supports an external CMOS level oscillator
source or a crystal resonator device.
Oscillator
If an external clock source is used, X1 should be tied to the
clock source and X2 should be left floating.
Specifications for CMOS oscillators: 25 MHz in MII Mode
and 50 MHz in RMII Mode are listed in Table 14 and Table
15.
Crystal
A 25 MHz, parallel, 20 pF load crystal resonator should be
used if a crystal source is desired. Figure 13 shows a typi-
cal connection for a crystal resonator circuit. The load
1
This limit is provided as a guideline for component selection and to guaranteed by production testing.
Refer to AN-1548, “PHYTER 100 Base-TX Reference Clock Jitter Tolerance,“ for details on jitter performance.
Rise / Fall Time
Parameter
Frequency
Frequency
Frequency
Symmetry
Tolerance
Stability
Jitter
Jitter
40%
Min
Table 14. 25 MHz Oscillator Specification
Typ
25
42
capacitor values will vary with the crystal vendors; check
with the vendor for the recommended loads.
The oscillator circuit is designed to drive a parallel reso-
nance AT cut crystal with a minimum drive level of 100 W
and a maximum of 500 W. If a crystal is specified for a
lower drive level, a current limiting resistor should be
placed in series between X2 and the crystal.
As a starting point for evaluating an oscillator circuit, if the
requirements for the crystal are not known, C
should be set at 33 pF, and R
Specification for 25 MHz crystal are listed in Table 16.
800
800
60%
Max
+50
+50
6
1
1
Figure 13. Crystal Oscillator Circuit
C
L1
X1
Units
MHz
nsec
psec
psec
ppm
ppm
1
should be set at 0
Operational Tempera-
1 year aging
X2
20% - 80%
Duty Cycle
Condition
Short term
Long term
R
ture
C
1
L2
L1
and C
L2