AT32UC3A3128 Atmel Corporation, AT32UC3A3128 Datasheet - Page 347

• Manufacturer Part Number: AT32UC3A3128
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A3128

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 110
• Ext Interrupts: 110
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 128
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 12
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.12 User Interface
Table 19-2.
32072G–11/2011
0x0CC
Offset
0x01C
0x09C
0x0A0
0x0A8
0x0B0
0x0B8
0x0C0
0x0C8
0x0F0
0x0F4
0x0F8
0x000
0x008
0x010
0x018
0x040
0x044
0x048
0x050
0x058
0x060
0x068
0x070
0x074
0x098
0x100
0x108
0x110
0x118
0x120
0x124
0x148
0x14c
0x150
DMA Controller Memory Map
Channel 3 Source Gather Register
Channel 0 Destination Address Register
Channel 1 Destination Address Register
Channel 2 Destination Address Register
Channel 3 Destination Address Register
Channel 0 Destination Scatter Register
Channel 1 Destination Scatter Register
Channel 2 Destination Scatter Register
Channel 0 Linked List Pointer Register
Channel 0 Configuration Register High
Channel 1 Linked List Pointer Register
Channel 1 Configuration Register High
Channel 2 Linked List Pointer Register
Channel 2 Configuration Register High
Channel 3 Linked List Pointer Register
Channel 3 Configuration Register High
Channel 0 Configuration Register Low
Channel 1 Configuration Register Low
Channel 2 Configuration Register Low
Channel 3 Configuration Register Low
Channel 0 Source Address Register
Channel 1 Source Address Register
Channel 2 Source Address Register
Channel 3 Source Address Register
Channel 0 Source Gather Register
Channel 2 Source Gather Register
Channel 1Source Gather Register
Channel 0 Control Register High
Channel 1 Control Register High
Channel 2 Control Register High
Channel 3 Control Register High
Channel 0 Control Register Low
Channel 1 Control Register Low
Channel 2 Control Register Low
Channel 3 Control Register Low
Register
Register Name
CFG0H
CFG1H
CFG2H
CFG3H
CFG0L
CFG1L
CFG2L
CFG3L
CTL0H
CTL1H
CTL2H
CTL3H
CTL0L
CTL1L
CTL2L
CTL3L
DAR0
SGR0
DAR1
SGR1
SGR2
SGR3
SAR0
DSR0
SAR1
DSR1
SAR2
DAR2
DSR2
SAR3
DAR3
LLP0
LLP1
LLP2
LLP3
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Read/Write
Access
Reset Value
0x00000000
0x00000000
0x00000000
0x00304801
0x00000002
0x00000004
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00304801
0x00000002
0x00000004
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00304801
0x00000002
0x00000004
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00304801
0x00000002
0x00000004
0x00000000
0x00000c00
0x00000c20
0x00000c40
0x00000c60
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