ATmega169P Atmel Corporation, ATmega169P Datasheet - Page 392

• Manufacturer Part Number: ATmega169P
• Manufacturer: Atmel Corporation

Specifications of ATmega169P

• Flash (kbytes): 16 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 17
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Segment Lcd: 100
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8018O–AVR–10/09
23 LCD Controller ..................................................................................... 234
24 JTAG Interface and On-chip Debug System ..................................... 252
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 259
26 Boot Loader Support – Read-While-Write Self-Programming ......... 280
22.6Changing Channel or Reference Selection .........................................................221
22.7ADC Noise Canceler ...........................................................................................222
22.8ADC Conversion Result ......................................................................................227
22.9ADC Register Description ...................................................................................229
23.1Features ..............................................................................................................234
23.2Overview .............................................................................................................234
23.3Mode of Operation ...............................................................................................237
23.4LCD Usage ..........................................................................................................242
23.5LCD Register Description ....................................................................................246
24.1Overview .............................................................................................................252
24.2TAP – Test Access Port ......................................................................................253
24.3TAP Controller .....................................................................................................255
24.4Using the Boundary-scan Chain ..........................................................................256
24.5Using the On-chip Debug System .......................................................................256
24.6On-chip Debug Specific JTAG Instructions .........................................................257
24.7On-chip Debug Related Register in I/O Memory .................................................258
24.8Using the JTAG Programming Capabilities .........................................................258
24.9Bibliography .........................................................................................................258
25.1Features ..............................................................................................................259
25.2System Overview ................................................................................................259
25.3Data Registers .....................................................................................................260
25.4Boundary-scan Specific JTAG Instructions .........................................................261
25.5Boundary-scan Chain ..........................................................................................262
25.6Boundary-scan Order ..........................................................................................272
25.7Boundary-scan Description Language Files ........................................................278
25.8Boundary-scan Related Register in I/O Memory .................................................279
26.1Features ..............................................................................................................280
26.2Overview .............................................................................................................280
26.3Application and Boot Loader Flash Sections .......................................................280
26.4Read-While-Write and No Read-While-Write Flash Sections ..............................281
26.5Boot Loader Lock Bits .........................................................................................284
ATmega169P
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