ATmega169P Atmel Corporation, ATmega169P Datasheet - Page 71

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ATmega169P

Manufacturer Part Number
ATmega169P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega169P

Flash (kbytes)
16 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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13.3
8018P–AVR–08/10
Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os.
shows how the port pin control signals from the simplified
ridden by alternate functions. The overriding signals may not be present in all port pins, but the
figure serves as a generic description applicable to all port pins in the AVR microcontroller
family.
Figure 13-5. Alternate Port Functions
Note:
Table 13-2 on page 72
indexes from
signals are generated internally in the modules having the alternate function.
PUOExn:
PUOVxn:
DDOExn:
DDOVxn:
PVOExn:
PVOVxn:
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
SLEEP:
PTOExn:
Pxn
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
Pxn, PORT TOGGLE OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE ENABLE
Pxn PULL-UP OVERRIDE VALUE
Pxn DATA DIRECTION OVERRIDE ENABLE
Pxn DATA DIRECTION OVERRIDE VALUE
Pxn PORT VALUE OVERRIDE ENABLE
Pxn PORT VALUE OVERRIDE VALUE
SLEEP CONTROL
SLEEP, and PUD are common to all ports. All other signals are unique for each pin.
Figure 13-5 on page 71
summarizes the function of the overriding signals. The pin and port
1
0
1
0
1
0
1
0
PUOExn
PUOVxn
DIEOExn
DDOExn
DDOVxn
PVOExn
PVOVxn
DIEOVxn
SLEEP
(1)
are not shown in the succeeding tables. The overriding
PUD:
WDx:
RDx:
RRx:
WRx:
RPx:
WPx:
clk
DIxn:
AIOxn:
SYNCHRONIZER
D
L
I/O
SET
CLR
:
Q
Q
PULLUP DISABLE
WRITE DDRx
READ DDRx
READ PORTx REGISTER
WRITE PORTx
READ PORTx PIN
WRITE PINx
I/O CLOCK
DIGITAL INPUT PIN n ON PORTx
ANALOG INPUT/OUTPUT PIN n ON PORTx
D
PINxn
CLR
Q
Q
Figure 13-2 on page 66
RESET
RESET
PORTxn
Q
Q
DDxn
Q
Q
CLR
CLR
D
D
1
0
clk
PUD
WDx
RRx
DIxn
AIOxn
RDx
RPx
ATmega169P
I/O
WRx
can be over-
Figure 13-5
PTOExn
WPx
I/O
,
71

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