SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 1104

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

40.11.3.1
1104
1104
Master Write Mode
Master Read Mode
Slave Read Mode
Slave Write Mode
SAM3S8/SD8
SAM3S8/SD8
Maximum SPI Frequency
Figure 40-19. SPI Slave Mode with (CPOL = NCPHA = 0) or (CPOL= NCPHA= 1)
The following formulas give maximum SPI frequency in Master read and write modes and in
Slave read and write modes.
NPCS0
SPCK
MISO
MOSI
The SPI is only sending data to a slave device such as an LCD, for example. The limit is
given by SPI
speed (see
pad.
T
DataFlash (AT45DB642D), T
In the formula above, F
In slave mode, SPCK is the input clock for the SPI. The max SPCK frequency is given by
setup and hold timings SPI
the pad limit, the limit in slave read mode is given by SPCK pad.
For 3.3V I/O domain and SPI6, F
before sampling data.
f
valid
SPCK
f
SPCK
is the slave time response to output data after deleting an SPCK edge. For Atmel SPI
Max
Max
Section 40.11.2 “I/O
=
2
=
(or SPI
SPI
--------------------------------------------------------
SPI
--------------------------------------------------------------------------------------- -
2x S ( PI
14
0
(
orSPI
5
) timing. Since it gives a maximum frequency above the maximum pad
6max
SPCK
1
3
SPI
(
)
Max = 33.0 MHz @ VDDIO = 3.3V.
7
orSPI
/SPI
+
valid
9
T
1
valid
Characteristics”), the max SPI frequency is the one from the
(or T
8
SPCK
(or SPI
9max
SPI
Max = 25 MHz. T
v
10
) is 12 ns Max.
)
+
10
T
/SPI
setup
11
SPI
)
). Since this gives a frequency well above
11
setup
is the setup time from the master
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
SPI
15