SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 875
SAM3SD8C
Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
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35.5.2
35.5.3
35.5.4
Table 35-4.
Note:
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Fault Inputs
PA9
Main OSC
ADC
Analog Comparator
Timer0
Timer1
1. FPOL bit in PWMC_FMR.
Power Management
Interrupt Sources
Fault Inputs
Fault Inputs
Table 35-2.
The PWM is not continuously clocked. The programmer must first enable the
Power Management Controller (PMC) before using the
not require PWM operations, the
later. In this case, the
In the
is connected.
The
Using the
not recommended to use the
Table 35-3.
The
mentation of these module within the product for detailed information about the fault generation
procedure. The
Controller and Timer/Counters
External PWM Fault Input Number
–
–
PWMFI0
–
1
–
PWM
PWM
Instance
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
PWM
interrupt line is connected on one of the internal sources of the Interrupt Controller.
PWM
has the FAULT inputs connected to the different modules. Please refer to the imple-
description, Master Clock (MCK) is the clock of the peripheral bus to which the
I/O Lines
Peripheral IDs
PWM
interrupt requires the Interrupt Controller to be programmed first. Note that it is
receives faults from PIO inputs, PMC, ADC controller, Analog Comparator
PWM
31
ID
will resume its operations where it left off.
PWM
PWM
PWML1
PWML2
PWML2
PWML2
PWML2
PWML3
PWML3
PWML3
interrupt line in edge sensitive mode.
clock can be stopped when not needed and be restarted
Polarity Level
User Defined
1
1
1
1
1
(1)
PWM
PC15
PB13
PC22
PA16
PA30
PA15
PC2
PC3
. However, if the application does
Fault Input ID
0
1
2
3
4
5
SAM3S8/SD8
SAM3S8/SD8
PWM
C
C
B
A
A
B
B
B
clock in the
PWM
875
875
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