SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 332

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

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SAM3S8/SD8
SAM3S8/SD8
When the CRCCU is enabled, the CRCCU reads the predefined amount of data (defined in
TR_CTRL) located at TR_ADDR start address and computes the checksum.
The CRCCU_SR register contains the temporary CRC value.
The BTSIZE field located in the TR_CTRL register (located in memory), is automatically decre-
mented if its value is different from zero. Once the value of the BTSIZE field is equal to zero, the
CRCCU is disabled by hardware. In this case, the relevant CRCCU DMA Status Register bit,
DMASR, is automatically cleared.
If the COMPARE field of the CRCCU_MR register is set to true, the TR_CRC (Transfer Refer-
ence Register) is compared with the last CRC computed. If a mismatch occurs, an error flag is
set and an interrupt is raised (if unmasked).
The CRCCU accesses the memory by single access (TRWIDTH size) in order not to limit the
bandwidth usage of the system, but the DIVIDER field of the CRCCU Mode Register can be
used to lower it by dividing the frequency of the single accesses.
In order to compute the CRC for a memory size larger than 256 Kbytes or for non-contiguous
memory area, it is possible to re-enable the CRCCU on the new memory area and the CRC will
be updated accordingly. Use the RESET field of the CRCCU_CR register to reset the CRCCU
Status Register to its default value (0xFFFF_FFFF).
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12