SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 917

• Manufacturer Part Number: SAM3SD8C
• Manufacturer: Atmel Corporation

Selection of the comparison used to set the flag WRDY and the corresponding PDC transfer request.
35.7.10
Name:
Address:
Access:
• UPDULOCK: Synchronous Channels Update Unlock
0 = No effect
1 = If the UPDM field is set to “0” in
triggers the update of the period value, the duty-cycle and the dead-time values of synchronous channels at the beginning
of the next PWM period. If the field UPDM is set to “1” or “2”, writing the UPDULOCK bit to “1” triggers only the update of
the period value and of the dead-time values of synchronous channels.
This bit is automatically reset when the update is done.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
31
23
15
–
–
–
7
–
PWM Sync Channels Update Control Register
PWM_SCUC
0x40020028
Read-write
30
22
14
–
–
–
6
–
“PWM Sync Channels Mode Register” on page
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
–
916, writing the UPDULOCK bit to “1”
SAM3S8/SD8
SAM3S8/SD8
25
17
–
–
9
–
1
–
UPDULOCK
24
16
–
–
8
–
0
917
917