SAM3SD8C Atmel Corporation, SAM3SD8C Datasheet - Page 378

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SAM3SD8C

Manufacturer Part Number
SAM3SD8C
Description
Manufacturer
Atmel Corporation
Datasheets
Figure 23-3. NAND Flash Signal Multiplexing on SMC Pins
378
378
SAM3S8/SD8
SAM3S8/SD8
* in CCFG_SMCNFCS Matrix register
NCSx (activated if SMC_NFCSx=1) *
Note: When NAND Flash logic is activated, (SMCNFCSx=1), NWE pin cannot be used i PIO
Mode but only in peripheral mode (NWE function). If NWE function is not used for other external
memories (SRAM, LCD), it must be configured in one of the following modes.
The address latch enable and command latch enable signals on the NAND Flash device are
driven by address bits A22 and A21of the address bus. Any bit of the address bus can also be
used for this purpose. The command, address or data words on the data bus of the NAND Flash
d e v i c e u s e th e i r o w n a d dr e s s e s w i th i n t h e N C S x a d d r es s s p a c e (c o n fi gu r e d b y
CCFG_SMCNFCS Register on the Bus Matrix User Interface). The chip enable (CE) signal of
the device and the ready/busy (R/B) signals are connected to PIO lines. The CE signal then
remains asserted even when NCS3 is not selected, preventing the device from returning to
standby mode. The NANDCS output signal should be used in accordance with the external
NAND Flash device type.
Two types of CE behavior exist depending on the NAND flash device:
Figure 23-4
• PIO Input with pull-up enabled (default state after reset)
• PIO Output set at level 1
• Standard NAND Flash devices require that the CE pin remains asserted Low continuously
• This restriction has been removed for “CE don’t care” NAND Flash devices. The NCSx signal
SMC
during the read busy period to prevent the device from returning to standby mode. Since the
Static Memory Controller (SMC) asserts the NCSx signal High, it is necessary to connect the
CE pin of the NAND Flash device to a GPIO line, in order to hold it low during the busy period
preceding data read out.
can be directly connected to the CE pin of the NAND Flash device.
illustrates both topologies: Standard and “CE don’t care” NAND Flash.
NWE
NRD
NAND Flash Logic
NANDOE
NANDWE
NANDOE
NANDWE
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12

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