LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 74

The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2

LPC2926_27_29

Manufacturer Part Number
LPC2926_27_29
Description
The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
Table 37.
C
[1]
LPC2926_27_29
Product data sheet
Symbol
t
t
t
V
t
t
t
t
t
t
r
f
FRFM
FEOPT
FDEOP
JR1
JR2
EOPR1
EOPR2
Fig 26. Differential data-to-EOP transition skew and EOP width
L
CRS
= 50 pF; R
Characterized but not implemented as production test. Guaranteed by design.
T
differential
data lines
PERIOD
Dynamic characteristics: USB pins (full-speed)
pu
= 1.5 k
9.2 USB interface
Parameter
rise time
fall time
differential rise and fall time
matching
output signal crossover voltage
source SE0 interval of EOP
source jitter for differential transition
to SE0 transition
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
EOP width at receiver
Ω
on D+ to V
n × T
differential data to
crossover point
DD(3V3)
SE0/EOP skew
PERIOD
All information provided in this document is subject to legal disclaimers.
, unless otherwise specified.
+ t
FDEOP
Rev. 5 — 28 September 2010
Conditions
10 % to 90 %
10 % to 90 %
see
see
10 % to 90 %
must reject as
EOP; see
Figure 26
must accept as
EOP; see
Figure 26
t
r
/ t
f
Figure 26
Figure 26
crossover point
ARM9 microcontroller with CAN, LIN, and USB
extended
LPC2926/2927/2929
[1]
[1]
Min
7.7
-
1.3
160
−2
−18.5
−9
40
82
8.5
source EOP width: t
receiver EOP width: t
Typ
-
-
-
-
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
Max
13.8
13.7
109
2.0
175
+5
+18.5
+9
-
-
FEOPT
002aab561
EOPR1
, t
EOPR2
Unit
ns
ns
%
V
ns
ns
ns
ns
ns
ns
74 of 95

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