LPC2926_27_29 NXP Semiconductors, LPC2926_27_29 Datasheet - Page 85

The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2

LPC2926_27_29

Manufacturer Part Number
LPC2926_27_29
Description
The LPC2926/2927/2929 combine an ARM968E-S CPU core with two integrated TCMblocks operating at frequencies of up to 125 MHz, Full-speed USB 2
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
LPC2926_27_29
Product data sheet
10.4 XIN_OSC input
10.5 XIN_OSC Printed Circuit Board (PCB) layout guidelines
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C
capacitor to ground C
mode, a minimum of 200 mV (RMS) is needed. For more details see the LPC29xx User
manual UM10316.
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C
case of third overtone crystal usage, have a common ground plane. The external
components must also be connected to the ground plain. Loops must be made as small
as possible, in order to keep the noise coupled in via the PCB as small as possible. Also
parasitics should stay as small as possible. Values of C
smaller accordingly to the increase in parasitics of the PCB layout.
Fig 38. Slave mode operation of the on-chip oscillator
i
= 100 pF. To limit the input voltage to the specified range, choose an additional
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 28 September 2010
g
which attenuates the input voltage by a factor C
XIN_OSC
ARM9 microcontroller with CAN, LIN, and USB
C i
100 pF
LPC29xx
LPC2926/2927/2929
002aae730
C g
x1
and C
x2
x1
should be chosen
and C
i
/(C
© NXP B.V. 2010. All rights reserved.
x2
i
, and C
+ C
g
). In slave
x3
85 of 95
in

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