tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 123

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tmp88cs38ng

Manufacturer Part Number
tmp88cs38ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
AD Conversion Result Register
ADCDR1
(00031H)
ADCDR2
(00032H)
2.11.3
2.11.4
Note 1: The EOCF is cleared to “0” when reading the ADCDR1.
Note 2: ADBR is set to “1” by starting AD conversion and cleared to “0” by end of AD conversion. Additionally,
AD07
AD Converter Operation
applied to VSS pin. Dividing a reference voltage between VDD and VSS to the voltage
corresponding to a bit by a rudder resistance and comparing it with the analog input
voltage converts the AD.
Interrupt
EOCF
ADBF
7
7
AD converter disable mode
Software start mode
Trigger start mode
The high side of an analog reference voltage is applied to VDD, and the low side is
Interrupt request signal occur at the timing when the EOCF bit is set to “1”.
Therefore, the AD conversion result should be read to ADCDR1 more first than ADCDR2.
ADBF is cleared to “0” by setting AMD = “00” in ADCCR2 or entering to the STOP mode.
AD06
AD conversion end flag
AD conveersion busy flag
6
6
Mode
EOCF
AD05
5
5
Figure 2.11.3 AD Converter Result Register
Table 2.11.1 AD Converter Operation Mode
ADBF
AD04
4
4
AD03
AD converter stop mode. This mode is always used to change
modes.
Single AD conversion of 1 channel which specifies input.
Single AD conversion of 1 channel which specifies input
(AD8TRG) from Key-on wakeup circuit as a trigger.
3
3
88CS38-123
0:
1:
0:
1:
Under conversion or before conversion
End of conversion
During stop of AD conversion
During AD conversion
AD02
2
2
AD01
1
1
Function
AD00
0
0
TMP88CS38/CM38A/CP38A
(Initial value: 0000 0000)
(Initial value: **00 ****)
2007-09-12
Read
only

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