tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 44

• Manufacturer Part Number: tmp88cs38ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.2
I/O Ports
latches, so the external input data should either be held externally until read or reading should
be performed several times before processing. Figure 2.2.1 shows input/output timing examples.
External data is read from an I/O port in the S1 state of the read cycle during execution of the
read instruction. This timing can not be recognized from outside, so that transient input such as
chattering must be processed by the program. Output data changes in the S2 state of the write
cycle during execution of the instruction which writes to an I/O port.
The TMP88CS38/CM38A/CP38A has 6 parallel input/output ports (33 pins) as follows:
Each output port contains a latch, which holds the output data. All input ports do not have
Note: The positions of the read and write cycles may vary, dispending on the instruction.
Port P2
Port P3
Port P4
Port P5
Port P6
Port P7
Output latch
Input strobe
Data output
Instruction
Instruction
Data input
execution
execution
pulse
cycle
cycle
1-bit I/O port
6-bit I/O port
8-bit I/O port
8-bit I/O port
8-bit I/O port
2-bit I/O port
Primary Function
Figure 2.2.1 Input/Output Timing (Example)
S
S
0
0
Fetch cycle
Fetch cycle
S
S
1
1
S
S
2
2
Ex.: LD
Ex.: LD
S
S
3
3
88CS38-44
(b) Output timing
S
S
(a) Input timing
External interrupt input, and STOP mode release signal input
External interrupt input, remote control signal input, data slicer analog
input, timer/counter input, serial bus interface input/output and data
slicer input
Pulse width modulation output
Pulse width modulation output external interrupt input, timer/counter
input, key-on wakeup input, serial bus interface input/output, analog
input and I output from OSD circuitry.
R, G, B and Y/BL output from OSD circuitry, R.G.B and Y/BL input,
analog input, test video signal output and key-on wakeup input
Horizontal synchronous pulse input and vertical synchronous pulse
input to OSD circuitry
0
0
Fetch cycle
Fetch cycle
A, (x)
(x), A
S
S
1
1
S
S
2
2
S
S
3
3
S
S
0
0
Read cycle
Write cycle
S
S
Secondary Functions
1
1
S
S
2
2
S
S
3
3
TMP88CS38/CM38A/CP38A
2007-09-12