tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 64
tmp88cs38ng
Manufacturer Part Number
tmp88cs38ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CS38NG.pdf
(226 pages)
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Source clock
Up counter
TC1DRB
ACAP1
INTTC1 interrupt
Source clock
Up counter
TC1DRA
(2) External trigger timer mode
Example 1: Detects rising edge in TC1 pin input and generates an interrupt 100 μs later. (at fc = 16.0 MHz, DV1CK
Example 2: Generates an interrupt, inputting “L” level pulse (Pulse width: 4 ms or more) to the TC1 pin. (at fc = 16.0
0
?
?
the TC1 pin input. Either the rising or falling edge can be selected with TC1S. Source
clock is an internal clock. The contents of TC1DRA is compared with the contents of up
counter. If a match is found, an INTTC1 interrupt is generated, and the counter is
cleared to “0” and halted. The counter is restarted by the selected edge of the TC1 pin
input.
the trigger edge to start counting clears the counter, and the counter is stopped.
Inputting a constant pulse width can generate interrupts. When METT1 is “0”, the
reverse directive edge input is ignored. The TC1 pin input edge before a match
detection is also ignored.
rejected as noise. A pulse width of 13/fc [s] or more is required for edge detection in
NORMAL or IDLE mode.
In this mode, counting up is started by an external trigger. This trigger is the edge of
When METT1 (Bit6 in TC1CR) is “1”, inputting the edge to the reverse direction of
The TC1 pin input has the noise rejection; therefore, pulses of 7/fc [s] or less are
Count start
m − 2
n
LDW
DI
SET
EI
LD
LD
LDW
DI
SET
EI
LD
LD
= 1)
MHz, DV1CK = 1)
m − 1
1
(TC1DRA), 0064H
(EIRL). 4
(TC1CR), 00001000B
(TC1CR), 00101000B
(TC1DRA), 00FAH
(EIRL). 4
(TC1CR), 00000100B
(TC1CR), 01110100B
Figure 2.5.3 Timer Mode Timing Chart
m − 1
2
m
3
Capture
m
4
88CS38-64
m + 1
m + 1
Match detect
(a) Timer mode
(b) Auto capture
m + 2
n − 1 n 0
m + 2
;
;
;
;
;
;
;
;
Counter clear
100 μs ÷ 2
INTTC1 interrupt enable
Selects the source clock and mode
TC1 external trigger start, METT1 = 0
4 ms ÷ 2
INTTC1 interrupt enable
Selects the source clock and mode
TC1 external trigger start, METT1 = 1
1
n − 1
2
8
/fc = FAH
TMP88CS38/CM38A/CP38A
4
/fc = 64H
n − 1
3
n
4
Capture
n
5
n + 1
6
n + 1
2007-09-12
7
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