tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 66

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tmp88cs38ng

Manufacturer Part Number
tmp88cs38ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
INTTC1 interrupt
INTTC1 interrupt
TC1 pin input
TC1 pin input
Internal clock
Internal clock
Up counter
Up counter
TC1DRA
TC1DRA
(4) Window mode
(5) Pulse width measurement mode
?
?
Command start
product of the TC1 pin input (Window pulse) and an internal clock. The contents of
TC1DRA are compared with the contents of up counter. If a match is found, an INTTC1
interrupt is generated, and the counter is cleared. Positive or negative logic for the TC1
pin input can be selected with bit4 or 5 in TC1CR.
can be analyzed by the program. That is; the frequency must be considerably slower
than the selected internal clock.
by TC1CR). The trigger can be selected either the rising or falling edge of the TC1 pin
input. The source clock is used an internal clock. On the next falling (rising) edge, the
counter contents are transferred to TC1DRB and an INTTC1 interrupt is generated.
The counter is cleared when the single edge capture mode is set. When double edge
capture is set, the counter continues and, at the next rising (falling) edge, the counter
contents are again transferred to TC1DRB. If a falling (rising) edge capture value is
required, it is necessary to read out TC1DRB contents until a rising (falling) edge is
detected. Falling or rising edge is selected with the external trigger TC1S (Bit4 or 5 in
TC1CR), and single edge or double edge is selected with MCAP1 (Bit6 in TC1CR).
Command start
Counting up is performed on the rising edge of the pulse that is the logical AND-ed
It is necessary that the maximum applied frequency be such that the counter value
In this mode, counting is started by the external trigger (Set to external trigger start
n
Count start
9
0
Count start
Figure 2.5.6 Window Mode Timing Chart
1
0
(a) Positive logic (at TC1S = 10)
(a) Negative logic (at TC1S = 11)
1
2
2
88CS38-66
3
Count stop
4
3
4
Count stop
5
5
Count start
Match detect
6
6
Count start
7
TMP88CS38/CM38A/CP38A
0
Counter clear
Match detect
1
7
2
8
9
3
0
Counter clear
2007-09-12
1

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