tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 72
tmp88cs38ng
Manufacturer Part Number
tmp88cs38ng
Description
Cmos 8-bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88CS38NG.pdf
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TC2 pin input
Up counter
Timer register
INTTC2 interrupt
(2) Event counter mode
Example: Sets the event counter mode and generates an INTTC2 interrupt 640 counts later.
contents of TC2DR are compared with the contents of the up counter. If a match is
found, an INTTC2 interrupt is generated, and the counter is cleared. The minimum
pulse width to the TC2 pin is shown in Table 2.6.2. Two or more machine cycles are
required for both the “H” and “L” levels of the pulse width. Match detect is executed on
the falling edge of the TC2 pin. A match can not be detected and INTTC2 is not
generated when the pulse is still in a falling state.
In this mode, events are counted on the rising edge of the TC2 pin input. The
Count start
0
LDW
DI
SET
EI
LD
LD
Table 2.6.2 Timer/Counter 2 External Clock Source
Figure 2.6.4 Event Counter Mode Timing Chart
1
“H” Width
“L” Width
(TC2DR), 640
(EIRH). 6
(TC2CR), 00011100B
(TC2CR), 00111100B
2
3
88CS38-72
n
Minimum Pulse Width [S]
Match detect
NORMAL, IDLE Mode
n − 1
2
2
;
;
;
;
n
3
3
/fc
/fc
Sets TC2DR
Enables INTTC2 interrupt
Selects TC2 source clock
Starts TC2
0
Counter clear
1
TMP88CS38/CM38A/CP38A
2
3
2007-09-12
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