tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 208

• Manufacturer Part Number: tmp88cs38ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.17.2
Functions
(1) Video signal input
(2) Synchronous separator
(3) Data separator
(4) Sync-tip clamp circuit
(5) Pedestal clamp circuit
(6) DA converter
(7) Comparator
(8) H timing circuit
(9) V timing circuit
(10) Slice level control circuit
between the video signal and the video signal input pin of VIN1 and VIN0 pins, that is
shown as Figure 2.17.3 the low pass filter functions to reduce noise and color burst
from the video signal, passes the amplifier and inputs the video signal to both VIN1
and VIN0 pins.
DACL7 to DACL0 of DACLCR are set for the synchronous separation, the sync slice
level is capable of setting. DACL7 to DACL4 set the slice level at the rising edge of the
sync signal clamped data, and DACL3 to DACL0 set the slice level at the falling edge of
the sync-tip clamped data. (Refer to section 2.17.5)
digital signal.
of the caption data slice level is capable of setting. (Refer to section 2.17.5)
the H/V timing part, which is called as a pedestal clamp.
inputting to the comparator.
synchornously from the video signal, and generates the clamp pulse to clamp the video
signal and provides it to the pedestal clamp circuit. In addition, the circuit detects the
change of H frequency and provides the data to the sampling clock generation part.
synchornously from the video signal, and provides line 21 detection signal to take out
caption signal to the slice level control part.
detection signal generated at H/V timing part after slicing, and controls to the most
suitable slice level and takes out the caption data.
A low pass filter, a voltage amplifier and a condenser of about 0.1 μF are connected
This circuit is to separate the synchronous signal from the video signal. When
The data separator replaces the caption data piled on the video signal with the
When SLVL5 to SLVL0 of SLVLCR are set to get the digital signal, the Initial value
The sync-tip level is clamped to the specified value.
The video signal is set to the specified voltage with the clamp pulse generated from
This converter gets the DA changed slice level of the clamp circuit to the comparator.
This comparator replaces the composite video signal with the digital value while
This circuit detects the horizontal synchronous signal from C.Sync signal separated
This circuit detects the horizontal synchronous signal from C.Sync signal separated
This circuit detects CRI (Clock run in) signal from VIDEO signal with line 21
88CS38-208
TMP88CS38/CM38A/CP38A
2007-09-12