tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 62

• Manufacturer Part Number: tmp88cs38ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

TC1DRA
(00010, 00011H)
TC1DRB
(00012, 00013H)
MCAP1
TC1CK
ACAP1
METT1
TC1M
TC1S
2.5.2
(00014H)
TC1CR
TC1 operating mode select
TC1 source clock select [Hz]
Auto capture control
Pulse width measurement
mode control
External trigger timer
mode control
TC1 start control
Note 1: fc: High-frequency clock [Hz]
Note 2: The timer register consists of two shift registers. A value set in the timer register is put in effect at the rising
Note 3: Set the mode, source clock PPG control and timer F/F control when TC1 stops (TC1S = 00).
Note 4: Auto capture can be used in only timer, event counter, and window modes.
Note 5: Values to be loaded to timer registers must satisfy the following condition.
Note 6: Always write “0” to TFF1 except PPG output mode.
Note 7: On entering STOP mode, the TC1 start control (TC1S) is cleared to “00” automatically. So, the timer stops.
Note 8: In the Auto-capture function, when the capture value is read after stop and clear counter or Auto-capture
Note 9: Since the up-counter value is captured into TC1DRB by the source clock of up-counter after setting
Control
16-bit timer registers (TC1DRA and TC1DRB).
The timer/counter 1 is controlled by a timer/counter 1 control register (TC1CR) and two
“0”
15
7
edge of the first source clock pulse that occurs after the upper data (TC1DRAH) are written. Therefore, the
lower byte must be written before the upper byte (It is recommended that a 16-bit access instruction be
used in writing). Writing only the lower data (TC1DRAL) does not put the setting of the timer register in
effect.
TC1DRA > TC1DRB, TC1DRA > 1
Once the STOP mode has been released, to start using the timer counter, set TC1S again.
disable is executed by the TC1 start control (TC1S), the correct capture value might not be able to be
read.When using Auto-capture function, set capture to enable.
TC1CR<ACAP1> to “1”. Therefore, to read the captured value, wait at least one cycle of the internal source
clock before reading TC1DRB for the first time.
ACPAP1
MCAP1
MPPG1
METT1
14
6
Figure 2.5.2 Timer Registers and TC1 Control Register
13
5
TC1DRA
TC1DRB
TC1S
12
4
00: Timer/external trigger timer/event counter mode
01: Window mode
10: Pulse width measurement mode
11: Reserved
00: Stop and counter clear
01: Command start
10: External trigger start at the rising edge
11: External trigger start at the falling edge
0: Auto-capture disable
0: Double edge capture
0: Trigger start
00
01
10
11
H
H
(00011H)
(00013H)
11
3
TC1CK
10
2
88CS38-62
DV1CK = 0
9
1
TC1M
fc/2
fc/2
fc/2
11
7
3
8
0
External clock (TC1 pin input)
DV7CK = 0, DVCK = 00
NORMAL, IDLE mode
1: Auto-capture enable
1: Single edge capture
1: Trigger start and stop
7
Read/Write
(Initial value: 0000 0000)
6
Timer Extend Event
○
○
Read/Write
×
×
5
TMP88CS38/CM38A/CP38A
TC1DRA
TC1DRB
○
○
○
×
Read only
DV1CK = 1
4
○
○
○
×
fs/2
L
L
fc/2
fc/2
(00010H)
(00012H)
Window
12
8
4
3
○
○
○
×
Pulse
○
○
○
×
2
2007-09-12
PPG
○
○
○
×
1
R/W
0