tmp88cs38ng TOSHIBA Semiconductor CORPORATION, tmp88cs38ng Datasheet - Page 214

• Manufacturer Part Number: tmp88cs38ng
• Description: Cmos 8-bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.17.4
Clamp and Data Slicer Operation
a.
b.
The slicer uses the following steps to obtain the caption signals:
The data slicer has two separation circuits:
The two circuits are described briefly below.
Sync signal (sync tip clamp + sync signal slice) separation.
Caption data (pedestal clamp + data slice) separation.
generation of sampling clock
Caption signal extraction
Sync signal separation
Caption line detection
Slice level setting and
CRI detection
The composite video signal input via VIN1 (Pin 40) is clamped by the sync tip
clamp circuit and the HD and VD sync signals separated by the sync separation
circuit.
Field decision and caption line detection are effected using the HD and VD sync
signals
The CRI signal of the caption line interval is detected from the pedestal clamped
video signal at VIN0 (Pin 41).
The slice level is controlled during the CRI signal interval, detected by the slice
level control block, to obtain the optimum level.
To determine the timing for extracting the caption data, a sampling clock is
generated that is phase locked to the CRI.
The caption data is extracted at the selected slice level using sampling clock,
which is locked to the caption data.
88CS38-214
TMP88CS38/CM38A/CP38A
2007-09-12