hm5264165f-75 Elpida Memory, Inc., hm5264165f-75 Datasheet - Page 14

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hm5264165f-75

Manufacturer Part Number
hm5264165f-75
Description
64m Lvttl Interface Sdram
Manufacturer
Elpida Memory, Inc.
Datasheet
HM5264165F/HM5264805F/HM5264405F-75/A60/B60
Self-refresh entry [SELF]: When this command is input during the IDLE state, the SDRAM starts self-
refresh operation. After the execution of this command, self-refresh continues while CKE is Low. Since self-
refresh is performed internally and automatically, external refresh operations are unnecessary.
Power down mode entry: When this command is executed during the IDLE state, the SDRAM enters power
down mode. In power down mode, power consumption is suppressed by cutting off the initial input circuit.
Self-refresh exit: When this command is executed during self-refresh mode, the SDRAM can exit from self-
refresh mode. After exiting from self-refresh mode, the SDRAM enters the IDLE state.
Power down exit: When this command is executed at the power down mode, the SDRAM can exit from
power down mode. After exiting from power down mode, the SDRAM enters the IDLE state.
Function Truth Table
The following table shows the operations that are performed when each command is issued in each mode of
the SDRAM.
The following table assumes that CKE is high.
Current state
Precharge
Idle
14
CS
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
RAS
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
Data Sheet E0135H10
CAS WE
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Address
BA, CA, A10 READ/READ A
BA, CA, A10 WRIT/WRIT A
BA, RA
BA, A10
MODE
BA, CA, A10 READ/READ A
BA, CA, A10 WRIT/WRIT A
BA, RA
BA, A10
MODE
Command
DESL
NOP
BST
ACTV
PRE, PALL
REF, SELF
MRS
DESL
NOP
BST
ACTV
PRE, PALL
REF, SELF
MRS
Operation
Enter IDLE after t
Enter IDLE after t
NOP
ILLEGAL*
ILLEGAL*
ILLEGAL*
NOP*
ILLEGAL
ILLEGAL
NOP
NOP
NOP
ILLEGAL*
ILLEGAL*
Bank and row active
NOP
Refresh
Mode register set
6
4
4
4
5
5
RP
RP

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