hm5264165f-75 Elpida Memory, Inc., hm5264165f-75 Datasheet - Page 30

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hm5264165f-75

Manufacturer Part Number
hm5264165f-75
Description
64m Lvttl Interface Sdram
Manufacturer
Elpida Memory, Inc.
Datasheet
HM5264165F/HM5264805F/HM5264405F-75/A60/B60
Read command to Write command interval:
1. Same bank, same ROW address: When the write command is executed at the same ROW address of the
same bank as the preceding read command, the write command can be performed after an interval of no less
than 1 clock. However, DQM, DQMU/DQML must be set High so that the output buffer becomes High-Z
before data input.
READ to WRITE Command Interval (1)
READ to WRITE Command Interval (2)
2. Same bank, different ROW address: When the ROW address changes, consecutive write commands
cannot be executed; it is necessary to separate the two commands with a precharge command and a bank-
active command.
3. Different bank: When the bank changes, the write command can be performed after an interval of no less
than 1 clock, provided that the other bank is in the bank-active state. However, DQM, DQMU/DQML must
be set High so that the output buffer becomes High-Z before data input.
30
DQM,
DQMU
/DQML
Command
Dout
Din
DQM,
DQMU/DQML
CLK
Dout
CL=3
CL=2
Command
CL=3
CL=2
CLK
Din
Data Sheet E0135H10
READ WRIT
READ
High-Z
in B0
in B1
in B2
2 clock
in B3
WRIT
High-Z
High-Z
Burst Length = 4
Burst write

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