hm5264165f-75 Elpida Memory, Inc., hm5264165f-75 Datasheet - Page 23

• Manufacturer Part Number: hm5264165f-75
• Description: 64m Lvttl Interface Sdram
• Manufacturer: Elpida Memory, Inc.

Burst Length
Write operation: Burst write or single write mode is selected by the OPCODE (A13, A12, A11, A10, A9,
A8) of the mode register.
1. Burst write: A burst write operation is enabled by setting OPCODE (A9, A8) to (0, 0). A burst write
starts in the same clock as a write command set. (The latency of data input is 0 clock.) The burst length can
be set to 1, 2, 4, 8, and full-page, like burst read operations. The write start address is specified by the column
address (AY0 to AY7; HM5264165F, AY0 to AY8; HM5264805F, AY0 to AY9; HM5264405F) and the
bank select address (A12/A13) at the write command set cycle.
Command
Command
Address
Address
Dout
Din
CLK
CLK
BL = 1
BL = 2
BL = 4
BL = 8
BL = full page
BL = 1
BL = 2
BL = 4
BL = 8
BL = full page
ACTV
Row
ACTV
Row
t
RCD
t
RCD
Column
READ
Column
WRIT
in 0
in 0
in 0
in 0
in 0
HM5264165F/HM5264805F/HM5264405F-75/A60/B60
in 1
in 1
in 1
in 1
out 0
out 0 out 1 out 2 out 3
out 0 out 1 out 2 out 3
out 0 out 1
out 0 out 1 out 2 out 3
Data Sheet E0135H10
in 2
in 2
in 2
in 3
in 3
in 3
in 4
in 4
in 5
in 5
out 4 out 5
out 4 out 5
in 6
in 6
out 6 out 7
out 6 out 7
in 7
in 7
in 8
out 8
in 0-1
out 0-1
CAS Latency = 2, 3
BL : Burst Length
CAS Latency = 2
in 0
out 0 out 1
in 1
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