ATAM893X-TKHYZ ATMEL [ATMEL Corporation], ATAM893X-TKHYZ Datasheet - Page 39

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ATAM893X-TKHYZ

Manufacturer Part Number
ATAM893X-TKHYZ
Description
Flash Version for ATAR080, ATAR090/890 and ATAR092/892
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
5.3.2.2
5.3.2.3
4680C–4BMCU–01/05
Timer 2 Output Modes
Timer 2 Output Signals
The signal at the timer output is generated via modulator 2. In the toggle mode, the compare
match event toggles the output T2O. For high resolution duty cycle modulation 8 bits or 12 bits
can be used to toggle the output. In the duty cycle burst modulator modes the DCG output is
connected to T2O and switched on and off either by the toggle flipflop output or the serial data
line of the SSI. Modulator 2 also has 2 modes to output the content of the serial interface as Bi-
phase or Manchester code.
The modulator output stage can be configured by the output control bits in the T2M2 register.
The modulator is started with the start of the shift register (SIR = 0) and stopped either by carry-
ing out a shift register stop (SIR = 1) or compare match event of stage 1 (CM1) of Timer 2. For
this task, Timer 2 mode 3 must be used and the prescaler has to be supplied with the internal
shift clock (SCL).
Figure 5-14. Timer 2 Modulator Output Stage
Timer 2 Output Mode 1
Toggle Mode A: A Timer 2 compare match toggles the output flip-flop (M2)
Figure 5-15. Interrupt Timer/Square Wave Generator – the Output Toggles with Each Edge
CONTROL
Counter 2
Counter 2
SSI
Input
INT4
CMx
T2R
T2O
Compare Match Event
DCGO
SO
TOG2
RE
FE
OMSK
0
0
Manchester
modulator
Bi-phase/
0
1
2
T2M2
3
4
T2OS2, 1, 0
0
S1
1
RES/SET
2
T2TOP
Toggle
3
4
M2
0
M2
1
S2
2
ATAM893-D
3
T2O
4
Modulator 3
S3
0
T2O
1
39

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