ATAM893X-TKHYZ ATMEL [ATMEL Corporation], ATAM893X-TKHYZ Datasheet - Page 57
ATAM893X-TKHYZ
Manufacturer Part Number
ATAM893X-TKHYZ
Description
Flash Version for ATAR080, ATAR090/890 and ATAR092/892
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATAM893X-TKHYZ.pdf
(98 pages)
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5.3.3.9
5.3.3.10
4680C–4BMCU–01/05
Timer 3 Status Register 1 (T3ST) Read
Timer 3 Clock Select Register (T3CS)
Note:
Table 5-14.
Table 5-15.
T3ED
T3C2
T3C1
T3CS
T3E1
T3E0
T3CS1
T3CS0
Read
T3E1
T3CS1
1
1
0
0
The status bits T3C1, T3C2 and T3ED will be reset after a READ access to T3ST.
1
1
0
0
Timer 3 Edge select bit 1
Timer 3 Edge select bit 0
Timer 3 Clock Source select bit 1
Timer 3 Clock Source select bit 0
Timer 3 Edge Detect
This bit will be set by the edge-detect logic of Timer 3 input (T3I)
Timer 3 Compare 2
This bit will be set when a match occurs between Counter 3 and T3CO2
Timer 3 Compare 1
This bit will be set when a match occurs between Counter 3 and T3CO1
External Input Edge Select Bits
Select Clock Source Bits
T3E1
Bit 3
T3E0
Bit 3
- - -
1
0
1
0
TCS0
1
0
1
0
Timer 3 Input Edge Select (T3I)
- - -
Positive edge at T3I pin
Negative edge at T3I pin
Each edge at T3I pin
T3ED
T3E0
Bit 2
Bit 2
Counter 3 Input Signal (CL3)
System clock (SYSCL)
Output signal of Timer 2 (POUT)
Output signal of Timer 1 (T1OUT)
External input signal from T3I edge detect
T3CS1
T3C2
Bit 1
Bit 1
T3CS0
Primary register address: 'C'hex — Read
T3C1
Bit 0
Bit 0
Address: 'B'hex — Subaddress: '1'hex
ATAM893-D
Reset value: x000b
Reset value: 1111b
57
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