ATAM893X-TKHYZ ATMEL [ATMEL Corporation], ATAM893X-TKHYZ Datasheet - Page 42

• Manufacturer Part Number: ATAM893X-TKHYZ
• Description: Flash Version for ATAR080, ATAR090/890 and ATAR092/892
• Manufacturer: ATMEL [ATMEL Corporation]

5.3.2.4
42
ATAM893-D
Timer 2 Registers
Timer 2 Output Mode 5
Manchester Modulator: Timer 2 Modulates the SSI internal data output (SO) to Manchester
code
Figure 5-21. Manchester Modulation
Timer 2 Output Mode 7
PWM Mode: Pulse-width modulation output on Timer 2 output pin (T2O)
In this mode the timer overflow defines the period and the compare register defines the duty
cycle. During one period only the first compare match occurrence is used to toggle the timer out-
put flip-flop. Until the overflow all further compare match are ignored. This avoids the situation
that changing the compare register causes the occurrence of several compare match during one
period. The resolution at the pulse-width modulation Timer 2 mode 1 is 12-bit and all other
Timer 2 modes are 8-bit.
Figure 5-22. PWM Modulation
Timer 2 has 6 control registers to configure the timer mode, the time interval, the input clock and
its output function. All registers are indirectly addressed using extended addressing as
described in
selected with the Port 4 control register P4CR, if one of the Timer 2 modes require an input at
T2I/BP41 or an output at T2O/BP42.
Counter 2/2
Counter 2/2
Input clock
OVF2
INT4
CM2
TOG2
T2R
T2O
T2O
SO
SC
Section 5.1 on page
0
Data: 00110101
Bit 7
Bit 7
0
0
0
T1
50
compare value
load the next
0
T
0
22. The alternate functions of the Ports BP41 or BP42 must be
1
255
1
0
T2
100
1
1
8-bit SR Data
T2CO2 = 150
T
0
255 0
0
T3
1
150 255 0 50
1
T
load
0
T1
0
1
load
T
Bit 0
Bit 0
1
4680C–4BMCU–01/05
255 0
T2
100
T