ATAM893X-TKHYZ ATMEL [ATMEL Corporation], ATAM893X-TKHYZ Datasheet - Page 44

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ATAM893X-TKHYZ

Manufacturer Part Number
ATAM893X-TKHYZ
Description
Flash Version for ATAR080, ATAR090/890 and ATAR092/892
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
5.3.2.7
5.3.2.8
44
ATAM893-D
Duty Cycle Generator
Timer 2 Mode Register 2 (T2M2)
Table 5-10.
The duty cycle generator generates duty cycles of 25%, 33% or 50%. The frequency at the duty
cycle generator output depends on the duty cycle and the Timer 2 prescaler setting. The DCG-
stage can also be used as an additional programmable prescaler for Timer 2.
Figure 5-23. DCG Output Signals
T2M2
T2TOP
T2OS2
T2OS1
T2OS0
Mode
1
2
3
4
DCGO0
DCGO1
DCGO2
DCGO3
DCGIN
T2MS1
Bit 3
T2TOP
Timer 2 Toggle Output Preset
This bit allows the programmer to preset the Timer 2 output T2O.
T2TOP = 0, resets the toggle outputs with the write cycle (M2 = 0)
T2TOP = 1, sets toggle outputs with the write cycle (M2 = 1)
Note: If T2R = 1, no output preset is possible
Timer 2 Output Select bit 2
Timer 2 Output Select bit 1
Timer 2 Output Select bit 0
1
1
0
0
Timer 2 Mode Select Bits
T2MS0
Bit 2
T2OS2
1
0
1
0
Clock Output (POUT)
4-bit counter overflow (OVF1)
4-bit compare output (CM1)
4-bit compare output (CM1)
4-bit compare output (CM1)
Bit 1
T2OS1
Bit 0
T2OS0
Address: '7'hex — Subaddress: '2'hex
Reset value: 1111b
Timer 2 Modes
12-bit compare counter, the DCG
have to be bypassed in this mode
8-bit compare counter with 4-bit
programmable prescaler and duty
cycle generator
8-bit compare counter clocked by
SYSCL or the external clock input
T2I, 4-bit prescaler run, the
counter 2/1 starts after writing
mode 3
8-bit compare counter clocked by
SYSCL or the external clock input
T2I, 4-bit prescaler stop and
resets
4680C–4BMCU–01/05

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