PCM18XK1 Microchip Technology, PCM18XK1 Datasheet - Page 390

MODULE PROC PIC18F8680,6680,8565

PCM18XK1

Manufacturer Part Number
PCM18XK1
Description
MODULE PROC PIC18F8680,6680,8565
Manufacturer
Microchip Technology
Datasheet

Specifications of PCM18XK1

Accessory Type
Processor Module
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
ICE2000
For Use With
ICE2000 - EMULATOR MPLAB-ICE 2000 POD
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
PIC18F6585/8585/6680/8680
IORLW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS30491C-page 388
Q Cycle Activity:
Before Instruction
After Instruction
Decode
W
W
Q1
=
=
0x9A
0xBF
Inclusive OR literal with W
[ label ]
0
(W) .OR. k
N, Z
The contents of W are OR’ed with
the eight-bit literal ‘k’. The result is
placed in W.
1
1
literal ‘k’
IORLW
Read
0000
Q2
k
255
IORLW k
1001
0x35
Process
W
Data
Q3
kkkk
Write to W
Q4
kkkk
IORWF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
RESULT =
W
RESULT =
W
Q1
=
=
register ‘f’
Inclusive OR W with f
[ label ]
0
d
a
(W) .OR. (f)
N, Z
Inclusive OR W with register ‘f’. If
‘d’ is ‘0’, the result is placed in W. If
‘d’ is ‘1’, the result is placed back in
register ‘f’ (default). If ‘a’ is ‘0’, the
Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1,
then the bank will be selected as
per the BSR value (default).
1
1
IORWF
Read
0001
Q2
0x13
0x91
0x13
0x93
f
[0,1]
[0,1]
 2004 Microchip Technology Inc.
255
RESULT, 0, 1
IORWF
00da
Process
Data
Q3
dest
ffff
f [,d [,a]]
destination
Write to
Q4
ffff

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