EVAL-ADT7411EBZ Analog Devices Inc, EVAL-ADT7411EBZ Datasheet - Page 20

• Manufacturer Part Number: EVAL-ADT7411EBZ
• Description: BOARD EVALUATION FOR ADT7411
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADT7411EBZ

• Sensor Type: Temperature
• Sensing Range: -40°C ~ 120°C
• Interface: DSP, I²C, MICROWIRE, QSPI, SMBus, SPI
• Sensitivity: ±0.5°C
• Voltage - Supply: 2.7 V ~ 5.5 V
• Embedded: No
• Utilized Ic / Part: ADT7411
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADT7411
If an MSB register is read first, its corresponding LSB register is
not locked out, thus leaving the user with the option of just
reading back 8 bits (MSB) of a 10-bit conversion result. Reading
an MSB register first does not lock out other MSB registers, and
likewise reading an LSB register first does not lock out other
LSB registers.
Table 7. ADT7411 Registers
RD/WR
Address
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h-17h
18h
19h
1Ah
1Bh-1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
28h
29h-2Ah
2Bh
2Ch
2Dh
SECOND READ
COMMAND
Name
Interrupt Status 1
Interrupt Status 2
Reserved
Internal Temperature and V
External Temperature and AIN1 to AIN 4 LSBs
AIN5 to AIN8 LSBs
V
Internal Temperature MSBs
External Temperature MSBs/AIN1 MSBs
AIN2 MSBs
AIN3 MSBs
AIN4 MSBs
AIN5 MSBs
AIN6 MSBs
AIN7 MSBs
AIN8 MSBs
Reserved
Control Configuration 1
Control Configuration 2
Control Configuration 3
Reserved
Interrupt Mask 1
Interrupt Mask 2
Internal Temperature Offset
External Temperature Offset
Reserved
Reserved
V
V
Internal T
Internal T
External T
External T
Reserved
AIN2 V
AIN2 V
AIN3 V
DD
DD
DD
V
V
MSBs
HIGH
LOW
HIGH
LOW
HIGH
Figure 30. Phase 2 of 10-Bit Read
Limit
Limit
HIGH
LOW
HIGH
LOW
Limit
Limit
Limit
UNLOCK ASSOCIATED
Limit
/AIN1 V
MSB REGISTERS
Limit
/AIN1 V
REGISTER
MSB
LOW
HIGH
Limits
Limits
DD
LSBs
OUTPUT
DATA
Power-
on
Default
00h
00h
00h
00h
00h
xxh
00h
00h
00h
00h
00h
00h
00h
00h
00h
08h
00h
00h
00h
00h
00h
00h
C7h
62h
64h
C9h
FFh
00h
FFh
00h
FFh
Rev. B | Page 20 of 36
RD/WR
Address
2Eh
2Fh
30h
31h
32h
33h
34h
35h
36h
37h
38h
39h-4Ch
4Dh
4Eh
4Fh
50h-7Eh
7F
80hn-FFh
Interrupt Status 1 Register (Read-Only) [Address = 00h]
This 8-bit read-only register reflects the status of some of the
interrupts that can cause the INT/ INT pin to go active. This
register is reset by a read operation provided that any out-of-
limit event is corrected. It is also reset by a software reset.
Table 8. Interrupt Status 1 Register
D7
0
1
Default settings at power-up.
1
D6
0
1
Name
AIN3 V
AIN4 V
AIN4 V
AIN5 V
AIN5 V
AIN6 V
AIN6 V
AIN7 V
AIN7 V
AIN8 V
AIN8 V
Reserved
Device ID
Manufacturer’s ID
Silicon Revision
Reserved
SPI Lock Status
Reserved
D5
0
1
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
HIGH
LOW
Limit
Limit
Limit
Limit
Limit
Limit
Limit
Limit
Limit
Limit
Limit
D4
0
1
D3
0
1
D2
0
1
D1
0
1
xxh
Power-
on
Default
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
FFh
00h
02h
41h
00h
00h
00h
D0
0
1