LPC2478FBD208,551 NXP Semiconductors, LPC2478FBD208,551 Datasheet - Page 624

• Manufacturer Part Number: LPC2478FBD208,551
• Description: IC ARM7 MCU 512K LCD 208-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2478FBD208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 96K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2C/I2S/IrDA/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, DK-35TS-LPC2478, DK-57TS-LPC2478, DK-57VTS-LPC2478, SOMDIMM-LPC2478, SAB-TFBGA208, KSK-LPC2478-JL, MCB2470
• Development Tools By Supplier: OM11015, OM11019, OM11022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1034 - PROGRAMMERS, DEVELOPMENT SYSTEMS622-1033 - KIT LCD TOUCH 5.7" FOR LPC2478MCB2470 - BOARD EVAL NXP LPC247X SERIESOM11022 - EVAL LPC-STICK WITH LPC2478OM11019 - BOARD EVAL FOR LPC2478568-4742 - MODULE DIMM LPC2478 ARM7568-4741 - KIT LCD TOUCH 5.7" FOR LPC2478622-1028 - KIT LCD TOUCH 5.7" FOR LPC2478KSDKLPC2478-PL - KIT IAR KICKSTART NXP LPC2478622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4369 - BOARD EVAL FOR LPC2478622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4363; 935284069551; LPC2478FBD208-S

NXP Semiconductors
UM10237_4
User manual
6.1 Interrupt Register (T[0/1/2/3]IR - 0xE000 4000, 0xE000 8000,
6.2 Timer Control Register (T[0/1/2/3]CR - 0xE000 4004, 0xE000 8004,
Table 546. Summary of timer/counter registers
[1]
0xE007 0000, 0xE007 4000)
The Interrupt Register consists of four bits for the match interrupts and four bits for the
capture interrupts. If an interrupt is generated then the corresponding bit in the IR will be
high. Otherwise, the bit will be low. Writing a logic one to the corresponding IR bit will reset
the interrupt. Writing a zero has no effect.
Table 547: Interrupt Register (T[0/1/2/3]IR - addresses 0xE000 4000, 0xE000 8000,
0xE007 0004, 0xE007 4004)
The Timer Control Register (TCR) is used to control the operation of the Timer/Counter.
Generic
Name
CR0
CR1
EMR
CTCR
Bit Symbol
0
1
2
3
4
5
6
7
Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
MR0 Interrupt Interrupt flag for match channel 0.
MR1 Interrupt Interrupt flag for match channel 1.
MR2 Interrupt Interrupt flag for match channel 2.
MR3 Interrupt Interrupt flag for match channel 3.
CR0 Interrupt Interrupt flag for capture channel 0 event.
CR1 Interrupt Interrupt flag for capture channel 1 event.
CR2 Interrupt Interrupt flag for capture channel 2 event.
CR3 Interrupt Interrupt flag for capture channel 3 event.
Description
Capture Register 0. CR0 is loaded with the
value of TC when there is an event on the
CAPn[0] (CAP0[0], CAP1[0], CAP2[0],
CAP3[0]) inputs.
Capture Register 1. CR1 is loaded with the
value of TC when there is an event on the
CAPn[1] pins (CAP0[1], CAP1[1], CAP2[1],
CAP3[1]) inputs.
External Match Register. The EMR controls
the external match pins MATn.0-3
(MAT0.0-3 and MAT1.0-3 respectively).
Count Control Register. The CTCR selects
between Timer and Counter mode, and in
Counter mode selects the signal and
edge(s) for counting.
0xE007 0000, 0xE007 4000) bit description
Description
Rev. 04 — 26 August 2009
…continued
Access Reset
RO
RO
R/W
R/W
Chapter 24: LPC24XX Timer0/1/2/3
Value
0
0
0
0
[1]
TIMERn Register/
Name & Address
T0CR0 - 0xE000 402C
T1CR0 - 0xE000 802C
T2CR0 - 0xE007 002C
T3CR0 - 0xE007 402C
T0CR1 - 0xE000 4030
T1CR1 - 0xE000 8030
T2CR1 - 0xE007 0030
T3CR1 - 0xE007 4030
T0EMR - 0xE000 403C
T1EMR - 0xE000 803C
T2EMR - 0xE007 003C
T3EMR - 0xE007 403C
T0CTCR -
0xE000 4070
T1CTCR -
0xE000 8070
T2CTCR -
0xE007 0070
T3CTCR -
0xE007 4070
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
Value
0
0
0
0
0
0
0
0