M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 104

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R
R
M
e
E
. v
J
1
0
6
2
Figure 11.3 DM1SL Register, DM0CON Register, and DM1CON Register
9
C
0 .
B
2 /
0
0
2
6
0
F
A
2
e
0 -
DMA1 request cause select register
NOTE:
DMAi control register
b7
b7
NOTES:
b
G
DSEL3 to DSEL0
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
1 .
2
1. The causes of DMA1 requests can be selected by a combination of DMS bit and DSEL3 to DSEL0 bits in the
1.The DMAS bit can be set to “0” by writing “0” in a program (This bit remains unchanged even if “1” is written).
2. At least one of the DAD and DSD bits must be “0” (address direction fixed).
o r
b6
b6
0
, 5
manner described below.
0
u
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
b5
b5
2
p
0
(
0
b4
b4
M
7
1
b3
b3
6
page 85
C
b2
b2
DMS=0(basic cause of request)
Falling edge of INT1 pin
Software trigger
Timer A0
Timer A1
Timer A2
Timer A3
Timer A4
Timer B0
Timer B1
Timer B2
UART0 transmit
UART0 receive
UART2 transmit
UART2 receive/ACK2
A/D conversion
UART1 receive
2 /
b1
b1
6
, A
b0
b0
(i=0,1)
M
f o
Bit symbol
1
Bit symbol
(b7-b6)
DMBIT
DMASL
DMAS
DMAE
DSEL0
DSEL1
DSEL2
DSEL3
(b5-b4)
DMS
DSR
DSD
DAD
6
3
Symbol
DM1SL
Symbol
DM0CON
DM1CON
C
2
9
2 /
6
, B
Transfer unit bit select bit
Repeat transfer mode
select bit
DMA request bit
DMA enable bit
Source address direction
select bit (2)
Destination address
direction select bit (2)
DMA request cause
select bit
Nothing is assigned. When write, set to “0”.
When read, its content is “0”.
DMA request cause
expansion select bit
Software DMA
request bit
Nothing is assigned. When write, set to “0”. When
read, its content is “0”.
M
1
6
C
Bit name
Bit name
2 /
6
) T
DMS=1(extended cause of request)
–
–
–
–
–
–
–
Two edges of INT1
–
–
–
–
–
–
–
–
Address
Address
03BA
002C
003C
16
16
16
Refer to note
A DMA request is generated by
setting this bit to “1” when the DMS
bit is “0” (basic cause) and the
DSEL3 to DSEL0 bits are “0001
(software trigger).
The value of this bit when read is “0” .
0: Basic cause of request
1: Extended cause of request
0 : 16 bits
1 : 8 bits
0 : Single transfer
1 : Repeat transfer
0 : DMA not requested
1 : DMA requested
0 : Disabled
1 : Enabled
0 : Fixed
1 : Forward
0 : Fixed
1 : Forward
00000X00
00000X00
After reset
After reset
00
Function
Function
16
2
2
2
”
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
(1)
11. DMAC