M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 195

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

R
R
M
e
E
1
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Table 13.1.6.2. Registers to Be Used and Settings in SIM Mode
NOTE:
6
0
2
C
9
Register
U2TB
U2RB
U2BRG
U2MR
U2C0
U2C1
U2SMR
U2SMR2
U2SMR3
U2SMR4
0 .
B
1. Not all bits in registers are described above. Set those bits to “0” when writing to the registers in SIM
2 /
0
0
6
2
mode.
A
0
F
(1)
(1)
2
e
G
0 -
(1)
b
1 .
o r
2
0
, 5
u
0
0 to 7
0 to 7
OER,FER,PER,SUM Error flag
0 to 7
SMD2 to SMD0
CKDIR
STPS
PRY
PRYE
IOPOL
CLK1, CLK0
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM
U2LCH
U2ERE
0 to 3
0 to 7
0 to 7
0 to 7
p
2
0
(
M
0
7
Bit
1
6
C
page 176
2 /
6
, A
M
1
f o
6
3
C
Set transmission data
Reception data can be read
Set a transfer rate
Set to ‘101
Select the internal clock or external clock
Set to “0”
Set this bit to “1” for direct format or “0” for inverse format
Set to “1”
Set to “0”
Select the count source for the U2BRG register
Invalid because CRD=1
Transmit register empty flag
Set to “1”
Set to “0”
Set to “0”
Set this bit to “0” for direct format or “1” for inverse format
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Set to “1”
Set to “0”
Set this bit to “0” for direct format or “1” for inverse format
Set to “1”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
2
2 /
9
6
, B
M
1
2
6
’
C
2 /
6
) T
Function
13. Serial I/O