DF2166VT33V Renesas Electronics America, DF2166VT33V Datasheet - Page 112

• Manufacturer Part Number: DF2166VT33V
• Description: IC H8S MCU FLASH 512K 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Package: 144TQFP
• Family Name: H8S
• Maximum Speed: 33 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 106
• Number Of Timers: 5
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: DF2166VTE33V; DF2166VTE33V; HD64F2166VTE33V; HD64F2166VTE33V

4.7
When accessing word data or longword data, this LSI assumes that the lowest address bit is 0. The
stack should always be accessed in words or longwords, and the value of the stack pointer (SP:
ER7) should always be kept even.
Use the following instructions to save registers:
Use the following instructions to restore registers:
Setting SP to an odd value may lead to a malfunction. Figure 4.3 shows an example of what
happens when the SP value is odd.
Rev. 3.00, 03/04, page 70 of 830
PUSH.W
PUSH.L
POP.W
POP.L
SP
Usage Note
Note: This diagram illustrates an example in which the interrupt control mode is 0.
[Legend]
CCR:
PC:
R1L:
SP:
SP set to H'FFFEFF
Condition code register
Program counter
General register R1L
Stack pointer
Rn
Rn
ERn
ERn
TRAPA instruction executed
Figure 4.3 Operation when SP Value Is Odd
(or
(or
(or
(or
MOV.W Rn, @-SP
MOV.W @SP+, Rn
MOV.L ERn, @-SP
MOV.L @SP+, ERn
SP
Data saved above SP
CCR
PC
)
)
)
)
MOV.B R1L, @-ER7 executed
SP
Contents of CCR lost
R1L
PC
H'FFFEFA
H'FFFEFB
H'FFFEFC
H'FFFEFD
H'FFFEFF
Address