DF2166VT33V Renesas Electronics America, DF2166VT33V Datasheet - Page 12

• Manufacturer Part Number: DF2166VT33V
• Description: IC H8S MCU FLASH 512K 144TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2166VT33V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 106
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-TQFP, 144-VQFP
• Cpu Family: H8S
• Device Core Size: 16/32Bit
• Frequency (max): 33MHz
• Interface Type: I2C/IrDA/SCI
• Total Internal Ram Size: 40KB
• # I/os (max): 106
• Number Of Timers - General Purpose: 5
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx10-bit
• On-chip Dac: 2-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 75C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: TQFP
• Package: 144TQFP
• Family Name: H8S
• Maximum Speed: 33 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16|32 Bit
• Number Of Programmable I/os: 106
• Number Of Timers: 5
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant
• Other names: DF2166VTE33V; DF2166VTE33V; HD64F2166VTE33V; HD64F2166VTE33V

2.8
2.9
Section 3 MCU Operating Modes ..................................................................... 53
3.1
3.2
3.3
3.4
Section 4 Exception Handling ........................................................................... 63
4.1
4.2
4.3
4.4
4.5
4.6
4.7
Section 5 Interrupt Controller............................................................................ 71
5.1
5.2
5.3
5.4
Rev. 3.00, 03/04, page x of xl
2.7.9
Processing States............................................................................................................... 49
Usage Notes ...................................................................................................................... 51
2.9.1
2.9.2
2.9.3
Operating Mode Selection ................................................................................................ 53
Register Descriptions........................................................................................................ 54
3.2.1
3.2.2
3.2.3
Operating Mode Descriptions ........................................................................................... 58
3.3.1
3.3.2
Address Map ..................................................................................................................... 60
Exception Handling Types and Priority............................................................................ 63
Exception Sources and Exception Vector Table ............................................................... 64
Reset ................................................................................................................................. 66
4.3.1
4.3.2
4.3.3
Interrupt Exception Handling ........................................................................................... 68
Trap Instruction Exception Handling................................................................................ 68
Stack Status after Exception Handling.............................................................................. 69
Usage Note........................................................................................................................ 70
Features............................................................................................................................. 71
Input/Output Pins.............................................................................................................. 73
Register Descriptions........................................................................................................ 74
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
Interrupt Sources............................................................................................................... 82
Effective Address Calculation ............................................................................. 47
Note on TAS Instruction Usage........................................................................... 51
Note on Bit Manipulation Instructions ................................................................ 51
EEPMOV Instruction........................................................................................... 52
Mode Control Register (MDCR) ......................................................................... 54
System Control Register (SYSCR)...................................................................... 55
Serial Timer Control Register (STCR) ................................................................ 56
Mode 2................................................................................................................. 58
Pin Functions in Each Operating Mode ............................................................... 58
Reset Exception Handling ................................................................................... 66
Interrupts after Reset............................................................................................ 67
On-Chip Peripheral Modules after Reset is Cancelled ........................................ 67
Interrupt Control Registers A to D (ICRA to ICRD)........................................... 74
Address Break Control Register (ABRKCR) ...................................................... 75
Break Address Registers A to C (BARA to BARC)............................................ 76
IRQ Sense Control Registers (ISCR16H, ISCR16L, ISCRH, ISCRL)................ 77
IRQ Enable Registers (IER16, IER) .................................................................... 79
IRQ Status Registers (ISR16, ISR)...................................................................... 80
Keyboard Matrix Interrupt Mask Registers (KMIMRA, KMIMR6) Wake-Up
Event Interrupt Mask Register (WUEMR3) ........................................................ 81