PIC16F684-E/P Microchip Technology, PIC16F684-E/P Datasheet - Page 33

• Manufacturer Part Number: PIC16F684-E/P
• Description: IC PIC MCU FLASH 2KX14 14DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Fr

Specifications of PIC16F684-E/P

• Program Memory Type: FLASH
• Program Memory Size: 3.5KB (2K x 14)
• Package / Case: 14-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Eeprom Size: 256 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: PIC16F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 12
• Number Of Timers: 3
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, DM163014, DM164120-4
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM163029 - BOARD PICDEM FOR MECHATRONICSACICE0207 - MPLABICE 14P 300 MIL ADAPTER
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.0
There are as many as twelve general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
4.1
PORTA is a 6-bit wide, bidirectional port. The
corresponding data direction register is TRISA
(Register 4-2). Setting a TRISA bit (= 1) will make the
corresponding PORTA pin an input (i.e., put the
corresponding output driver in a High-impedance
mode). Clearing a TRISA bit (= 0) will make the
corresponding PORTA pin an output (i.e., put the
contents of the output latch on the selected pin). The
exception is RA3, which is input only and its TRIS bit
will always read as ‘1’. Example 4-1 shows how to
initialize PORTA.
Reading the PORTA register (Register 4-1) reads the
status of the pins, whereas writing to it will write to the
port latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then
written to the port data latch. RA3 reads ‘0’ when
MCLRE = 1.
The TRISA register controls the direction of the
PORTA pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog
inputs. I/O pins configured as analog input always read
‘0’.
REGISTER 4-1:
Note:
Note:
 2004 Microchip Technology Inc.
I/O PORTS
PORTA and the TRISA Registers
bit 7-6:
bit 5-0:
Additional information on I/O ports may be
found in the “PICmicro
Family Reference Manual” (DS33023).
The ANSEL (91h) and CMCON0 (19h)
registers must be initialized to configure
an analog channel as a digital input. Pins
configured as analog inputs will read ‘0’.
PORTA – PORTA REGISTER (ADDRESS: 05h)
bit 7
Unimplemented: Read as ‘0’
RA<5:0>: PORTA I/O Pin bit
1 = Port pin is > V
0 = Port pin is < V
Legend:
R = Readable bit
-n = Value at POR
U-0
—
®
Mid-Range MCU
U-0
—
IH
IL
R/W-x
RA5
W = Writable bit
‘1’ = Bit is set
Preliminary
R/W-x
RA4
EXAMPLE 4-1:
4.2
Every PORTA pin on the PIC16F684 has an interrupt-
on-change option and a weak pull-up option. RA0 has
an Ultra Low-Power Wake-up option. The next three
sections describe these functions.
4.2.1
Each of the PORTA pins, except RA3, has an individu-
ally configurable internal weak pull-up. Control bits
WPUAx enable or disable each pull-up. Refer to
Register 4-3. Each weak pull-up is automatically turned
off when the port pin is configured as an output. The
pull-ups are disabled on a Power-on Reset by the
RAPU bit (OPTION_REG<7>). A weak pull-up is auto-
matically enabled for RA3 when configured as MCLR
and disabled when RA3 is an I/O. There is no software
control of the MCLR pull-up.
BCF
CLRF
MOVLW
MOVWF
BSF
CLRF
MOVLW
MOVWF
BCF
Additional Pin Functions
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
STATUS,RP0
PORTA
07h
CMCON0
STATUS,RP0
ANSEL
0Ch
TRISA
STATUS,RP0
RA3
WEAK PULL-UPS
INITIALIZING PORTA
R/W-x
RA2
;Bank 0
;Init PORTA
;Set RA<2:0> to
;digital I/O
;Bank 1
;digital I/O
;Set RA<3:2> as inputs
;and set RA<5:4,1:0>
;as outputs
;Bank 0
PIC16F684
x = Bit is unknown
R/W-0
RA1
DS41202C-page 31
R/W-0
RA0
bit 0