AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 111

• Manufacturer Part Number: AT90PWM81-16SN
• Description: IC MCU AVR 8K FLASH ISP 20SOIC
• Manufacturer: Atmel
• Series: AVR® 90PWM Lightingr

Specifications of AT90PWM81-16SN

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI
• Peripherals: Brown-out Detect/Reset, PWM, WDT
• Number Of I /o: 16
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 20-SOIC (7.5mm Width)
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: SPI
• Maximum Clock Frequency: 16 MHz
• Number Of Timers: 1
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• On-chip Dac: 10 bit, 1 Channel
• Height: 2.35 mm
• Length: 13 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7.6 mm
• For Use With: ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

12.7.1
7734P–AVR–08/10
Frequency distribution
According to the ramp mode and the enhanced resolution mode (defined by PBFMn1:0), the average fre-
quency deviation Δf can take three different values:
These values are applied according to the running mode and the enhanced resolution mode as per
12-5 on page
It must be noted that, in one and two ramps modes, it is possible to apply the FWM only on pulse width
while keeping a constant frequency.
Table 12-5.
1.
The frequency modulation is done by switching two frequencies in a 16 consecutive cycle frame. These
two frequencies are f
is the nearest base frequency below the wanted frequency. The number of f
number of f
pattern. This pattern can be as given in the following table or by any other implementation which give an
equivalent evenly distribution.
At the end of the 15th cycle (numbered 14 on
the bit PEOEPEn (PSC n End Of Enhanced Cycle Interrupt Enable) is set. This allows:
Four Ramps
Two Ramps
One Ramp
Center aligned
• To modify the modulation only on a new enhanced cycle start.
• To extend the enhanced modulation accuracy by software.
Running Mode
Note: The modulation is on the pulse width.
b2
111;
is d. The f
Frequency deviation with Flank Width Modulation
b1
and f
b1
and f
b2
where f
b2
frequencies are evenly distributed in the frame according to a predefined
Δf1 average
Δf1
Δf1
Δf1
Δf2
RB
00
Δf2 average
b1
(
(
is the nearest base frequency above the wanted frequency and f
Δf average
Table 12-6
(
)
)
=
=
f
RB+RA
f
PSC
PSC
Δf2
Δf2
Δf1
Δf2
)
01
) an interrupt can be generated. This is the case if
=
×
×
------------------------- -
16k k
0
---------------------- -
8k k
PBFMn1:0
(
(
d
d
+
+
2
1
)
)
b1
Δf1
0
Δf2
SB
10
0
(1)
in the frame is (d-16) and the
AT90PWM81
SB+SA
Δf2
Δf2
11
0
0
Table
111
b2