AT90PWM81-16SN Atmel, AT90PWM81-16SN Datasheet - Page 71

IC MCU AVR 8K FLASH ISP 20SOIC

AT90PWM81-16SN

Manufacturer Part Number
AT90PWM81-16SN
Description
IC MCU AVR 8K FLASH ISP 20SOIC
Manufacturer
Atmel
Series
AVR® 90PWM Lightingr
Datasheet

Specifications of AT90PWM81-16SN

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, PWM, WDT
Number Of I /o
16
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
20-SOIC (7.5mm Width)
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
SPI
Maximum Clock Frequency
16 MHz
Number Of Timers
1
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
On-chip Dac
10 bit, 1 Channel
Height
2.35 mm
Length
13 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
7.6 mm
For Use With
ATSTK600-SOIC - STK600 SOCKET/ADAPTER FOR SOIC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT90PWM81-16SN
Manufacturer:
Atmel
Quantity:
1 500
9.3
7734P–AVR–08/10
Alternate Port Functions
Most port pins have alternate functions in addition to being general digital I/Os.
port pin control signals from the simplified
riding signals may not be present in all port pins, but the figure serves as a generic description applicable
to all port pins in the AVR microcontroller family.
Figure 9-5.
Note:
Table 9-2
not shown in the succeeding tables. The overriding signals are generated internally in the modules having
the alternate function.
1. WRx, WPx, WDx, RRx, RPx, and RDx are common to all pins within the same port. clk
Pxn
summarizes the function of the overriding signals. The pin and port indexes from
PUD are common to all ports. All other signals are unique for each pin.
Alternate Port Functions
DIEOExn: Pxn DIGITAL INPUT-ENABLE OVERRIDE ENABLE
DIEOVxn: Pxn DIGITAL INPUT-ENABLE OVERRIDE VALUE
DDOExn: Pxn DATA DIRECTION OVERRIDE ENABLE
PUOExn: Pxn PULL-UP OVERRIDE ENABLE
PUOVxn: Pxn PULL-UP OVERRIDE VALUE
DDOVxn: Pxn DATA DIRECTION OVERRIDE VALUE
PVOExn: Pxn PORT VALUE OVERRIDE ENABLE
PVOVxn: Pxn PORT VALUE OVERRIDE VALUE
PTOExn: Pxn, PORT TOGGLE OVERRIDE ENABLE
SLEEP: SLEEP CONTROL
1
0
1
0
1
0
1
0
(1)
Figure 9-2
PUOExn
PUOVxn
DIEOExn
DDOExn
DDOVxn
PVOExn
PVOVxn
DIEOVxn
SLEEP
can be overridden by alternate functions. The over-
SYNCHRONIZER
D
L
SET
CLR
Q
Q
AIOxn: ANALOG INPUT/OUTPUT PIN n ON PORTx
WDx: WRITE DDRx
WRx: WRITE PORTx
PUD: PULLUP DISABLE
WPx: WRITE PINx
clk
DIxn: DIGITAL INPUT PIN n ON PORTx
RDx: READ DDRx
RRx: READ PORTx REGISTER
RPx: READ PORTx PIN
D
PINxn
I/O
CLR
: I/O CLOCK
Q
Q
RESET
RESET
PORTxn
Q
Q
Q
Q
DDxn
CLR
CLR
D
D
AT90PWM81
Figure 9-5
1
0
clk
PUD
WDx
RRx
RDx
DIxn
AIOxn
RPx
I/O
WRx
shows how the
I/O
Figure 9-5
PTOExn
WPx
, SLEEP, and
are
71

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