PIC18F65J90-I/PT Microchip Technology, PIC18F65J90-I/PT Datasheet - Page 401

IC PIC MCU FLASH 16KX16 64TQFP

PIC18F65J90-I/PT

Manufacturer Part Number
PIC18F65J90-I/PT
Description
IC PIC MCU FLASH 16KX16 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F65J90-I/PT

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, LVD, POR, PWM, WDT
Number Of I /o
51
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC18
No. Of I/o's
51
Ram Memory Size
2KB
Cpu Speed
40MHz
No. Of Timers
4
No. Of Pwm Channels
2
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
AUSART, EUSART, I2C, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
51
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183030
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Package
64TQFP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Operating Supply Voltage
2.5|3.3 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162079 - HEADER MPLAB ICD2 18F85J90 64/80AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F65J90-I/PT
Manufacturer:
VISHAY
Quantity:
2 400
Part Number:
PIC18F65J90-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC18F65J90-I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
PIC18F85J90 FAMILY
FSCM. See Fail-Safe Clock Monitor.
G
GOTO ............................................................................... 316
H
Hardware Multiplier ............................................................ 91
I
I/O Ports ........................................................................... 109
I
INCF ................................................................................. 316
INCFSZ ............................................................................ 317
In-Circuit Debugger .......................................................... 294
In-Circuit Serial Programming (ICSP) ...................... 283, 294
Indexed Literal Offset Addressing
Indexed Literal Offset Mode ............................................. 342
Indirect Addressing ............................................................ 75
DS39770B-page 400
2
C Mode (MSSP) ............................................................ 194
Introduction ................................................................ 91
Operation ................................................................... 91
Performance Comparison .......................................... 91
Input Voltage Considerations ................................... 109
Open-Drain Outputs ................................................. 110
Output Pin Drive ....................................................... 109
Pin Capabilities ........................................................ 109
Pull-up Configuration ............................................... 110
Acknowledge Sequence Timing ............................... 222
Associated Registers ............................................... 228
Baud Rate Generator ............................................... 215
Bus Collision
Clock Arbitration ....................................................... 216
Clock Stretching ....................................................... 208
Clock Synchronization and the CKP Bit ................... 209
Effects of a Reset ..................................................... 223
General Call Address Support ................................. 212
I
Master Mode ............................................................ 213
Multi-Master Communication, Bus Collision and Arbitra-
Multi-Master Mode ................................................... 223
Operation ................................................................. 199
Read/Write Bit Information (R/W Bit) ............... 199, 201
Registers .................................................................. 194
Serial Clock (SCK/SCL) ........................................... 201
Slave Mode .............................................................. 199
Sleep Operation ....................................................... 223
Stop Condition Timing .............................................. 222
and Standard PIC18 Instructions ............................. 342
2
C Clock Rate w/BRG ............................................. 215
Unexpected Termination .................................... 89
Write Verify ........................................................ 89
During a Repeated Start Condition .................. 226
During a Stop Condition ................................... 227
10-Bit Slave Receive Mode (SEN = 1) ............. 208
10-Bit Slave Transmit Mode ............................. 208
7-Bit Slave Receive Mode (SEN = 1) ............... 208
7-Bit Slave Transmit Mode ............................... 208
Baud Rate Generator ....................................... 215
Operation ......................................................... 214
Reception ......................................................... 219
Repeated Start Condition Timing ..................... 218
Start Condition Timing ..................................... 217
Transmission .................................................... 219
tion ................................................................... 223
Addressing ....................................................... 199
Addressing Masking ......................................... 200
Reception ......................................................... 201
Transmission .................................................... 201
Preliminary
INFSNZ ............................................................................ 317
Initialization Conditions for all Registers ...................... 51–53
Instruction Cycle ................................................................ 62
Instruction Set .................................................................. 295
Clocking Scheme ....................................................... 62
Flow/Pipelining ........................................................... 62
ADDLW .................................................................... 301
ADDWF .................................................................... 301
ADDWF (Indexed Literal Offset Mode) .................... 343
ADDWFC ................................................................. 302
ANDLW .................................................................... 302
ANDWF .................................................................... 303
BC ............................................................................ 303
BCF ......................................................................... 304
BN ............................................................................ 304
BNC ......................................................................... 305
BNN ......................................................................... 305
BNOV ...................................................................... 306
BNZ ......................................................................... 306
BOV ......................................................................... 309
BRA ......................................................................... 307
BSF .......................................................................... 307
BSF (Indexed Literal Offset Mode) .......................... 343
BTFSC ..................................................................... 308
BTFSS ..................................................................... 308
BTG ......................................................................... 309
BZ ............................................................................ 310
CALL ........................................................................ 310
CLRF ....................................................................... 311
CLRWDT ................................................................. 311
COMF ...................................................................... 312
CPFSEQ .................................................................. 312
CPFSGT .................................................................. 313
CPFSLT ................................................................... 313
DAW ........................................................................ 314
DCFSNZ .................................................................. 315
DECF ....................................................................... 314
DECFSZ .................................................................. 315
Extended Instructions .............................................. 337
General Format ........................................................ 297
GOTO ...................................................................... 316
INCF ........................................................................ 316
INCFSZ .................................................................... 317
INFSNZ .................................................................... 317
IORLW ..................................................................... 318
IORWF ..................................................................... 318
LFSR ....................................................................... 319
MOVF ...................................................................... 319
MOVFF .................................................................... 320
MOVLB .................................................................... 320
MOVLW ................................................................... 321
MOVWF ................................................................... 321
MULLW .................................................................... 322
MULWF .................................................................... 322
NEGF ....................................................................... 323
NOP ......................................................................... 323
Opcode Field Descriptions ....................................... 296
POP ......................................................................... 324
PUSH ....................................................................... 324
RCALL ..................................................................... 325
RESET ..................................................................... 325
RETFIE .................................................................... 326
Considerations when Enabling ........................ 342
Syntax .............................................................. 337
Use with MPLAB IDE Tools ............................. 344
© 2007 Microchip Technology Inc.

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