PIC18F27J13-I/SS Microchip Technology, PIC18F27J13-I/SS Datasheet - Page 149

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PIC18F27J13-I/SS

Manufacturer Part Number
PIC18F27J13-I/SS
Description
IC PIC MCU 128KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SS

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
TABLE 10-5:
TABLE 10-6:
 2010 Microchip Technology Inc.
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
ANCON1
REFOCON
CM3CON
PADCFG1
RTCCFG
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTB.
RB7/CCP7/
KBI3/PGD/
RP10
Legend: DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level
Note 1:
Name
2:
3:
4:
Pin
input/output; x = Don’t care (TRISx bit does not affect port direction or is overridden for this option)
Pins are configured as analog inputs by default on POR. Using these pins for digital inputs requires setting
the appropriate bits in the ANCON1 register.
All other pin functions are disabled when ICSP™ or ICD is enabled.
Only on 44-pin devices (PIC18F46J13, PIC18F47J13, PIC18LF46J13 and PIC18LF47J13).
Only on 28-pin devices (PIC18F26J13, PIC18F27J13, PIC18LF26J13 and PIC18LF27J13).
GIE/GIEH
TRISB7
VBGEN
RTCEN
INT2IP
LATB7
ROON
RBPU
CON
PORTB I/O SUMMARY (CONTINUED)
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
Bit 7
RB7
Function
CCP7
RP10
KBI3
PGD
RB7
PEIE/GIEL
INTEDG0
Setting
TRISB6
INT1IP
TRIS
LATB6
Bit 6
COE
RB6
0
1
1
0
1
x
x
1
0
I/O
O
O
O
O
O
I
I
I
I
RTCWREN RTCSYNC HALFSEC
INTEDG1
ROSSLP
TMR0IE
TRISB5
INT3IE
LATB5
CPOL
Bit 5
RB5
Type
DIG
TTL
DIG
TTL
DIG
DIG
I/O
ST
ST
ST
Preliminary
INTEDG2
LATB<7> data output.
PORTB<7> data input; weak pull-up when the RBPU bit is
cleared.
Capture input.
Interrupt-on-change pin.
Serial execution data output for ICSP and ICD operation.
Serial execution data input for ICSP and ICD operation.
Remappable Peripheral Pin 10 input.
PCFG12
EVPOL1
Compare/PWM output.
Remappable Peripheral Pin 10 output.
TRISB4
ROSEL
INT0IE
INT2IE
LATB4
Bit 4
RB4
PIC18F47J13 FAMILY
INTEDG3
PCFG11
EVPOL0
RODIV3
TRISB3
INT1IE
LATB3
RBIE
Bit 3
RB3
RTSECSEL1 RTSECSEL0 PMPTTL
Description
PCFG10
TMR0IP
RODIV2
TMR0IF
TRISB2
RTCOE
LATB2
INT3IF
CREF
Bit 2
RB2
RTCPTR1
RODIV1
TRISB1
PCFG9
INT0IF
INT3IP
INT2IF
LATB1
CCH1
Bit 1
RB1
DS39974A-page 149
RTCPTR0
RODIV0
TRISB0
PCFG8
LATB0
INT1IF
CCH0
RBIF
RBIP
Bit 0
RB0
(2)
(2)

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