PIC18F27J13-I/SS Microchip Technology, PIC18F27J13-I/SS Datasheet - Page 87

• Manufacturer Part Number: PIC18F27J13-I/SS
• Description: IC PIC MCU 128KB FLASH 28SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SS

• Core Size: 8-Bit
• Program Memory Size: 128KB (64K x 16)
• Core Processor: PIC
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Type: FLASH
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Digital Ic Case Style: SSOP
• Supply Voltage Range: 1.8V To 5.5V
• Embedded Interface Type: I2C, SPI, USART
• Rohs Compliant: Yes
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: I2C, SPI, EUSART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 19
• Number Of Timers: 8
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 10 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

6.2.3
The program memory is addressed in bytes. Instruc-
tions are stored as 2 bytes or 4 bytes in program
memory. The Least Significant Byte (LSB) of an
instruction word is always stored in a program memory
location with an even address (LSB = 0). To maintain
alignment
increments in steps of 2 and the LSB will always read
‘0’ (see Section 6.1.3 “Program Counter”).
Figure 6-5 provides an example of how instruction
words are stored in the program memory.
FIGURE 6-5:
6.2.4
The standard PIC18 instruction set has four, two-word
instructions: CALL, MOVFF, GOTO and LSFR. In all
cases, the second word of the instructions always has
‘1111’ as its four Most Significant bits (MSbs); the other
12 bits are literal data, usually a data memory address.
The use of ‘1111’ in the 4 MSbs of an instruction
specifies a special form of NOP. If the instruction is
executed in proper sequence immediately after the first
word, the data in the second word is accessed and
EXAMPLE 6-4:
 2010 Microchip Technology Inc.
CASE 1:
Object Code
CASE 2:
Object Code
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
INSTRUCTIONS IN PROGRAM
MEMORY
TWO-WORD INSTRUCTIONS
with
instruction
Instruction 1:
Instruction 2:
Instruction 3:
INSTRUCTIONS IN PROGRAM MEMORY
TWO-WORD INSTRUCTIONS
Program Memory
Byte Locations
Source Code
TSTFSZ
Source Code
MOVFF
ADDWF
TSTFSZ
MOVFF
ADDWF
boundaries,
MOVLW
GOTO
MOVFF
055h
0006h
123h, 456h
REG1
REG1, REG2 ; No, skip this word
REG3
REG1
REG1, REG2 ; Yes, execute this word
REG3
the
Preliminary
PC
LSB = 1
; is RAM location 0?
; Execute this word as a NOP
; continue code
; is RAM location 0?
; 2nd word of instruction
; continue code
PIC18F47J13 FAMILY
EFh
C1h
0Fh
F0h
F4h
The CALL and GOTO instructions have the absolute
program memory address embedded into the instruc-
tion. Since instructions are always stored on word
boundaries, the data contained in the instruction is a
word address. The word address is written to PC<20:1>,
which accesses the desired byte address in program
memory. Instruction #2 in Figure 6-5 displays how the
instruction, GOTO 0006h, is encoded in the program
memory. Program branch instructions, which encode a
relative address offset, operate in the same manner. The
offset value stored in a branch instruction represents the
number of single-word instructions that the PC will be
offset by. Section 28.0 “Instruction Set Summary”
provides further details of the instruction set.
used by the instruction sequence. If the first word is
skipped for some reason, and the second word is
executed by itself, a NOP is executed instead. This is
necessary for cases when the two-word instruction is
preceded by a conditional instruction that changes the
PC. Example 6-4 illustrates how this works.
Note:
LSB = 0
See Section 6.5 “Program Memory and
the Extended Instruction Set” for infor-
mation on two-word instructions in the
extended instruction set.
55h
03h
00h
23h
56h
Word Address
00000Ah
00000Ch
00000Eh
000000h
000002h
000004h
000006h
000008h
000010h
000012h
000014h
DS39974A-page 87