PIC18F27J13-I/SS Microchip Technology, PIC18F27J13-I/SS Datasheet - Page 286

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PIC18F27J13-I/SS

Manufacturer Part Number
PIC18F27J13-I/SS
Description
IC PIC MCU 128KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SS

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC18F47J13 FAMILY
REGISTER 19-4:
19.4.7
In Single Output mode, pulse steering allows any of the
PWM pins to be the modulated signal. Additionally, the
same PWM signal can simultaneously be available on
multiple pins.
Once
(CCPxM<3:2> = 11 and PxM<1:0> = 00 of the
CCPxCON register), the user firmware can bring out
the same PWM signal to one, two, three or four output
pins by setting the appropriate STR<D:A> bits
(PSTRxCON<3:0>), as provided in Table 19-3.
DS39974A-page 286
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Note:
PxRSEN
R/W-0
the
PULSE STEERING MODE
The associated TRIS bits must be set to
output (‘0’), to enable the pin output driver,
in order to see the PWM signal on the pin.
Single
PxRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPxASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPxASE must be cleared by software to restart the PWM
PxDC<6:0>: PWM Delay Count bits
PxDCn = Number of F
PxDC6
R/W-0
away; the PWM restarts automatically
ECCPxDEL: ECCP1/2/3 ENHANCED PWM CONTROL REGISTER
(1, ACCESS FBDh; 2, FB7h; 3, BANKED F18h)
Output
should transition active and the actual time it does transition active.
W = Writable bit
‘1’ = Bit is set
mode
PxDC5
R/W-0
OSC
is
/4 (4 * T
selected
PxDC4
R/W-0
Preliminary
OSC
) cycles between the scheduled time when a PWM signal
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PxDC3
R/W-0
While the PWM Steering mode is active, the
CCPxM<1:0> bits (CCPxCON<1:0>) select the PWM
output polarity for the Px<D:A> pins.
The PWM auto-shutdown operation also applies to
PWM Steering mode, as described in Section 19.4.4
“Enhanced
auto-shutdown event will only affect pins that have
PWM outputs enabled.
PxDC2
R/W-0
PWM
Auto-Shutdown
 2010 Microchip Technology Inc.
x = Bit is unknown
PxDC1
R/W-0
Mode”.
PxDC0
R/W-0
bit 0
An

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