PIC18F27J13-I/SS Microchip Technology, PIC18F27J13-I/SS Datasheet - Page 421

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PIC18F27J13-I/SS

Manufacturer Part Number
PIC18F27J13-I/SS
Description
IC PIC MCU 128KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SS

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
REGISTER 27-6:
REGISTER 27-7:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3
bit 2
bit 1
bit 0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6-0
Note 1:
WPCFG
R/WO-1
U-1
The “Configuration Words page” contains the FCWs and is the last page of implemented Flash memory on
a given device. Each page consists of 1,024 bytes. For example, on a device with 64 Kbytes of Flash, the
first page is 0 and the last page (Configuration Words page) is 63 (3Fh).
Unimplemented: Program the corresponding Flash Configuration bit to ‘1’
MSSPMSK: MSSP 7-Bit Address Masking Mode Enable bit
1 = 7-Bit Address Masking mode is enabled
0 = 5-Bit Address Masking mode is enabled
PLLSEL: PLL Circuit Selection bit
1 = 4x PLL circuit is selected
0 = 96 MHz PLL circuit is selected
ADCSEL: A/D Converter Mode bit
1 = 10-Bit Conversion mode is enabled
0 = 12-Bit Conversion mode is enabled
IOL1WAY: IOLOCK One-Way Set Enable bit
1 = IOLOCK bit (PPSCON<0>) can be set once, provided the unlock sequence has been completed;
0 = IOLOCK bit (PPSCON<0>) can be set and cleared as needed, provided the unlock sequence has
WPCFG: Write/Erase Protect Configuration Region Select bit (valid when WPDIS = 0)
1 = Configuration Words page is not erase/write-protected unless WPEND and WPFP<5:0> settings
0 = Configuration Words page is erase/write-protected, regardless of WPEND and WPFP<5:0>
WPFP<6:0>: Write/Erase Protect Page Start/End Location bits
Used with the WPEND bit to define which pages in Flash will be erase/write-protected.
R/WO-1
WPFP6
once set, the Peripheral Pin Select registers cannot be written to a second time
been completed
include the Configuration Words page
U-1
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
CONFIG4L: CONFIGURATION REGISTER 4 LOW (BYTE ADDRESS 300006h)
WO = Write-Once bit
‘1’ = Bit is set
WO = Write-Once bit
‘1’ = Bit is set
R/WO-1
WPFP5
U-1
R/WO-1
WPFP4
U-1
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
MSSPMSK
PIC18F47J13 FAMILY
R/WO-1
R/WO-1
WPFP3
R/WO-1
PLLSEL
R/WO-1
WPFP2
x = Bit is unknown
x = Bit is unknown
ADCSEL
R/WO-1
R/WO-1
WPFP1
DS39974A-page 421
IOL1WAY
R/WO-1
R/WO-1
WPFP0
(1)
bit 0
bit 0

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