PIC18F27J13-I/SS Microchip Technology, PIC18F27J13-I/SS Datasheet - Page 201

no-image

PIC18F27J13-I/SS

Manufacturer Part Number
PIC18F27J13-I/SS
Description
IC PIC MCU 128KB FLASH 28SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J13-I/SS

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Controller Family/series
PIC18
Cpu Speed
48MHz
Digital Ic Case Style
SSOP
Supply Voltage Range
1.8V To 5.5V
Embedded Interface Type
I2C, SPI, USART
Rohs Compliant
Yes
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
19
Number Of Timers
8
Operating Supply Voltage
2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM164128, DM180021, DM183026-2, DV164131, MA180030, DM183022, DM183032, DV164136, MA180024
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 10 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA180030 - BOARD DEMO PIC18F47J13 FS USBMA180029 - BOARD DEMO PIC18F47J53 FS USB
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
11.4
This section introduces some potential applications for
the PMP module.
FIGURE 11-27:
11.4.2
Partial multiplexing implies using more pins; however,
for a few extra pins, some extra performance can be
achieved. Figure 11-28 provides an example of a
memory or peripheral that is partially multiplexed with
FIGURE 11-28:
FIGURE 11-29:
 2010 Microchip Technology Inc.
Application Examples
PIC18F
PIC18F
PIC18F
PARTIALLY MULTIPLEXED
MEMORY OR PERIPHERAL
PMD<7:0>
PMD<7:0>
PMD<7:0>
PMALH
PMALL
PMALL
PMWR
PMWR
PMRD
PMALL
PMRD
PMCS
PMCS
PMWR
PMCS
PMRD
MULTIPLEXED ADDRESSING APPLICATION EXAMPLE
EXAMPLE OF A PARTIALLY MULTIPLEXED ADDRESSING APPLICATION
EXAMPLE OF AN 8-BIT MULTIPLEXED ADDRESS AND DATA APPLICATION
AD<7:0>
ALE
CS
RD
WR
373
373
373
Parallel Peripheral
Preliminary
A<15:8>
A<7:0>
D<7:0>
D<7:0>
A<7:0>
PIC18F47J13 FAMILY
11.4.1
Figure 11-27 demonstrates the hookup of a memory or
another addressable peripheral in Full Multiplex mode.
Consequently, this mode achieves the best pin saving
from the microcontroller perspective. However, for this
configuration, there needs to be some external latches
to maintain the address.
an external latch. If the peripheral has internal latches,
as displayed in Figure 11-29, then no extra circuitry is
required except for the peripheral itself.
MULTIPLEXED MEMORY OR
PERIPHERAL
A<7:0>
D<7:0>
CE
A<13:0>
D<7:0>
CE
OE
OE
WR
WR
Address Bus
Data Bus
Control Lines
Address Bus
Data Bus
Control Lines
Address Bus
Data Bus
Control Lines
DS39974A-page 201

Related parts for PIC18F27J13-I/SS